TW200729447A - Reversible-multiple footprint package and method of manufacturing - Google Patents

Reversible-multiple footprint package and method of manufacturing

Info

Publication number
TW200729447A
TW200729447A TW095131634A TW95131634A TW200729447A TW 200729447 A TW200729447 A TW 200729447A TW 095131634 A TW095131634 A TW 095131634A TW 95131634 A TW95131634 A TW 95131634A TW 200729447 A TW200729447 A TW 200729447A
Authority
TW
Taiwan
Prior art keywords
drain
die pad
leads
universal
edge
Prior art date
Application number
TW095131634A
Other languages
English (en)
Inventor
Jonathan A Noquil
Original Assignee
Fairchild Semiconductor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor filed Critical Fairchild Semiconductor
Publication of TW200729447A publication Critical patent/TW200729447A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
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    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37011—Shape comprising apertures or cavities
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    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
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    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
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    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
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    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW095131634A 2005-08-30 2006-08-28 Reversible-multiple footprint package and method of manufacturing TW200729447A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/215,485 US20070045785A1 (en) 2005-08-30 2005-08-30 Reversible-multiple footprint package and method of manufacturing

Publications (1)

Publication Number Publication Date
TW200729447A true TW200729447A (en) 2007-08-01

Family

ID=37802901

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095131634A TW200729447A (en) 2005-08-30 2006-08-28 Reversible-multiple footprint package and method of manufacturing

Country Status (5)

Country Link
US (1) US20070045785A1 (zh)
KR (1) KR20080038180A (zh)
CN (1) CN101263596A (zh)
TW (1) TW200729447A (zh)
WO (1) WO2007027790A2 (zh)

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DE102006015447B4 (de) * 2006-03-31 2012-08-16 Infineon Technologies Ag Leistungshalbleiterbauelement mit einem Leistungshalbleiterchip und Verfahren zur Herstellung desselben
JP5025394B2 (ja) * 2007-09-13 2012-09-12 株式会社東芝 半導体装置及びその製造方法
US7768108B2 (en) * 2008-03-12 2010-08-03 Fairchild Semiconductor Corporation Semiconductor die package including embedded flip chip
US8018054B2 (en) * 2008-03-12 2011-09-13 Fairchild Semiconductor Corporation Semiconductor die package including multiple semiconductor dice
US20090278241A1 (en) * 2008-05-08 2009-11-12 Yong Liu Semiconductor die package including die stacked on premolded substrate including die
US8680658B2 (en) * 2008-05-30 2014-03-25 Alpha And Omega Semiconductor Incorporated Conductive clip for semiconductor device package
US7888184B2 (en) * 2008-06-20 2011-02-15 Stats Chippac Ltd. Integrated circuit packaging system with embedded circuitry and post, and method of manufacture thereof
US8138587B2 (en) * 2008-09-30 2012-03-20 Infineon Technologies Ag Device including two mounting surfaces
US8049312B2 (en) * 2009-01-12 2011-11-01 Texas Instruments Incorporated Semiconductor device package and method of assembly thereof
US8963303B2 (en) * 2013-02-22 2015-02-24 Stmicroelectronics S.R.L. Power electronic device
US9824958B2 (en) 2013-03-05 2017-11-21 Infineon Technologies Austria Ag Chip carrier structure, chip package and method of manufacturing the same
US9852961B2 (en) * 2013-08-28 2017-12-26 Infineon Technologies Ag Packaged semiconductor device having an encapsulated semiconductor chip
KR20150035253A (ko) * 2013-09-27 2015-04-06 삼성전기주식회사 전력 반도체 패키지
DE102015104996B4 (de) * 2015-03-31 2020-06-18 Infineon Technologies Austria Ag Halbleitervorrichtungen mit Steuer- und Lastleitungen von entgegengesetzter Richtung
US10256207B2 (en) * 2016-01-19 2019-04-09 Jmj Korea Co., Ltd. Clip-bonded semiconductor chip package using metal bumps and method for manufacturing the package
US10727151B2 (en) * 2017-05-25 2020-07-28 Infineon Technologies Ag Semiconductor chip package having a cooling surface and method of manufacturing a semiconductor package
US10553524B2 (en) * 2017-10-30 2020-02-04 Microchip Technology Incorporated Integrated circuit (IC) die attached between an offset lead frame die-attach pad and a discrete die-attach pad
US11270969B2 (en) 2019-06-04 2022-03-08 Jmj Korea Co., Ltd. Semiconductor package
KR102327950B1 (ko) * 2019-07-03 2021-11-17 제엠제코(주) 반도체 패키지
CN110676317B (zh) * 2019-09-30 2022-10-11 福建省福联集成电路有限公司 一种晶体管管芯结构及制作方法
KR102098337B1 (ko) * 2019-11-22 2020-04-07 제엠제코(주) 반도체 패키지의 다중 클립 본딩 장치
US11355470B2 (en) * 2020-02-27 2022-06-07 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor device and methods of manufacturing semiconductor devices
DE102021124003A1 (de) 2021-09-16 2023-03-16 Infineon Technologies Ag Leistungshalbleitervorrichtung, Verfahren zur Herstellung einer Leistungshalbleitervorrichtung

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JP3602453B2 (ja) * 2000-08-31 2004-12-15 Ｎｅｃエレクトロニクス株式会社 半導体装置
US6777786B2 (en) * 2001-03-12 2004-08-17 Fairchild Semiconductor Corporation Semiconductor device including stacked dies mounted on a leadframe
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US6528880B1 (en) * 2001-06-25 2003-03-04 Lovoltech Inc. Semiconductor package for power JFET having copper plate for source and ribbon contact for gate
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Also Published As

Publication number Publication date
WO2007027790A3 (en) 2007-04-26
US20070045785A1 (en) 2007-03-01
KR20080038180A (ko) 2008-05-02
WO2007027790B1 (en) 2007-06-21
CN101263596A (zh) 2008-09-10
WO2007027790A2 (en) 2007-03-08

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