TW200721181A - Memory cell with high-k antifuse for reverse bias programming - Google Patents

Memory cell with high-k antifuse for reverse bias programming

Info

Publication number
TW200721181A
TW200721181A TW095124029A TW95124029A TW200721181A TW 200721181 A TW200721181 A TW 200721181A TW 095124029 A TW095124029 A TW 095124029A TW 95124029 A TW95124029 A TW 95124029A TW 200721181 A TW200721181 A TW 200721181A
Authority
TW
Taiwan
Prior art keywords
antifuse
memory cell
reverse bias
programming
bias programming
Prior art date
Application number
TW095124029A
Other languages
English (en)
Inventor
James M Cleeves
Original Assignee
Sandisk 3D Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk 3D Llc filed Critical Sandisk 3D Llc
Publication of TW200721181A publication Critical patent/TW200721181A/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G11C17/165—Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0073—Write using bi-directional cell biasing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/71—Three dimensional array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/72—Array wherein the access device being a diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Read Only Memory (AREA)
TW095124029A 2005-07-01 2006-06-30 Memory cell with high-k antifuse for reverse bias programming TW200721181A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/174,240 US7453755B2 (en) 2005-07-01 2005-07-01 Memory cell with high-K antifuse for reverse bias programming

Publications (1)

Publication Number Publication Date
TW200721181A true TW200721181A (en) 2007-06-01

Family

ID=37060999

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095124029A TW200721181A (en) 2005-07-01 2006-06-30 Memory cell with high-k antifuse for reverse bias programming

Country Status (9)

Country Link
US (1) US7453755B2 (zh)
EP (1) EP1899978B1 (zh)
JP (1) JP2008545276A (zh)
KR (1) KR101226172B1 (zh)
CN (1) CN101258558A (zh)
AT (1) ATE490541T1 (zh)
DE (1) DE602006018606D1 (zh)
TW (1) TW200721181A (zh)
WO (1) WO2007005273A1 (zh)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7176064B2 (en) * 2003-12-03 2007-02-13 Sandisk 3D Llc Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
US7618850B2 (en) * 2002-12-19 2009-11-17 Sandisk 3D Llc Method of making a diode read/write memory cell in a programmed state
US20070164388A1 (en) * 2002-12-19 2007-07-19 Sandisk 3D Llc Memory cell comprising a diode fabricated in a low resistivity, programmed state
US7800933B2 (en) 2005-09-28 2010-09-21 Sandisk 3D Llc Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance
US8008700B2 (en) * 2002-12-19 2011-08-30 Sandisk 3D Llc Non-volatile memory cell with embedded antifuse
US7660181B2 (en) * 2002-12-19 2010-02-09 Sandisk 3D Llc Method of making non-volatile memory cell with embedded antifuse
US7800932B2 (en) * 2005-09-28 2010-09-21 Sandisk 3D Llc Memory cell comprising switchable semiconductor memory element with trimmable resistance
US8018024B2 (en) 2003-12-03 2011-09-13 Sandisk 3D Llc P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
US7682920B2 (en) * 2003-12-03 2010-03-23 Sandisk 3D Llc Method for making a p-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
US20070069241A1 (en) 2005-07-01 2007-03-29 Matrix Semiconductor, Inc. Memory with high dielectric constant antifuses and method for using at low voltage
US7800934B2 (en) * 2005-09-28 2010-09-21 Sandisk 3D Llc Programming methods to increase window for reverse write 3D cell
KR20090089320A (ko) * 2006-11-15 2009-08-21 쌘디스크 3디 엘엘씨 유전체 안티휴즈와 직렬로 실리사이드에 인접하여 결정화된 ｐ-ｉ-ｎ 다이오드와 이를 형성하는 방법
US20080171876A1 (en) * 2007-05-10 2008-07-17 Santiago Ini Pure paliperidone and processes for preparing thereof
US7684226B2 (en) * 2007-06-25 2010-03-23 Sandisk 3D Llc Method of making high forward current diodes for reverse write 3D cell
JP2010531543A (ja) 2007-06-25 2010-09-24 サンディスク スリーディー，エルエルシー 逆方向書き込み３次元セルに用いる高順方向電流ダイオードおよびその製造方法
US7830697B2 (en) * 2007-06-25 2010-11-09 Sandisk 3D Llc High forward current diodes for reverse write 3D cell
US20090086521A1 (en) * 2007-09-28 2009-04-02 Herner S Brad Multiple antifuse memory cells and methods to form, program, and sense the same
US7961494B2 (en) 2008-04-11 2011-06-14 Sandisk 3D Llc Non-volatile multi-level re-writable memory cell incorporating a diode in series with multiple resistors and method for writing same
US8149607B2 (en) * 2009-12-21 2012-04-03 Sandisk 3D Llc Rewritable memory device with multi-level, write-once memory cells
KR20180028557A (ko) 2010-02-05 2018-03-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제조 방법
US8284597B2 (en) 2010-05-06 2012-10-09 Macronix International Co., Ltd. Diode memory
US8866121B2 (en) 2011-07-29 2014-10-21 Sandisk 3D Llc Current-limiting layer and a current-reducing layer in a memory device
US8659001B2 (en) 2011-09-01 2014-02-25 Sandisk 3D Llc Defect gradient to boost nonvolatile memory performance
US8637413B2 (en) 2011-12-02 2014-01-28 Sandisk 3D Llc Nonvolatile resistive memory element with a passivated switching layer
US8698119B2 (en) 2012-01-19 2014-04-15 Sandisk 3D Llc Nonvolatile memory device using a tunnel oxide as a current limiter element
US8686386B2 (en) 2012-02-17 2014-04-01 Sandisk 3D Llc Nonvolatile memory device using a varistor as a current limiter element
CN103943669B (zh) * 2013-01-22 2017-11-14 中芯国际集成电路制造(上海)有限公司 一种反熔丝结构及其制备方法
US20140241031A1 (en) 2013-02-28 2014-08-28 Sandisk 3D Llc Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same
CN106098691B (zh) * 2015-07-01 2019-05-28 珠海创飞芯科技有限公司 反熔丝结构、反熔丝存储器及其制作方法
US9633943B2 (en) 2015-08-14 2017-04-25 International Business Machines Corporation Method and structure for forming on-chip anti-fuse with reduced breakdown voltage
US20180137927A1 (en) * 2016-04-16 2018-05-17 Chengdu Haicun Ip Technology Llc Three-Dimensional Vertical One-Time-Programmable Memory Comprising No Separate Diode Layer
CN107342105B (zh) * 2016-04-28 2020-02-07 华邦电子股份有限公司 电阻式记忆胞的写入方法及电阻式内存
TWI704557B (zh) * 2019-12-24 2020-09-11 大陸商珠海南北極科技有限公司 單次可程式化位元之形成方法
KR20220104412A (ko) 2021-01-18 2022-07-26 삼성전자주식회사 발광 소자 및 이를 포함하는 표시 장치

Family Cites Families (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5311039A (en) * 1990-04-24 1994-05-10 Seiko Epson Corporation PROM and ROM memory cells
EP0656151A1 (en) 1992-08-21 1995-06-07 Xilinx, Inc. Antifuse structure and method for forming
US5475253A (en) 1992-08-21 1995-12-12 Xilinx, Inc. Antifuse structure with increased breakdown at edges
US5818749A (en) * 1993-08-20 1998-10-06 Micron Technology, Inc. Integrated circuit memory device
US5379250A (en) * 1993-08-20 1995-01-03 Micron Semiconductor, Inc. Zener programmable read only memory
JPH08316324A (ja) * 1995-05-16 1996-11-29 Kawasaki Steel Corp 半導体集積回路装置の製造方法
US7052941B2 (en) * 2003-06-24 2006-05-30 Sang-Yun Lee Method for making a three-dimensional integrated circuit structure
US5915167A (en) 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6369421B1 (en) * 1998-06-29 2002-04-09 Advanced Micro Devices, Inc. EEPROM having stacked dielectric to increase programming speed
US6351406B1 (en) * 1998-11-16 2002-02-26 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6034882A (en) 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6750500B1 (en) * 1999-01-05 2004-06-15 Micron Technology, Inc. Capacitor electrode for integrating high K materials
US6100120A (en) * 1999-05-11 2000-08-08 Advanced Micro Devices, Inc. Method of locally forming a high-k dielectric gate insulator
US6492241B1 (en) * 2000-04-10 2002-12-10 Micron Technology, Inc. Integrated capacitors fabricated with conductive metal oxides
US8575719B2 (en) 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
US6420215B1 (en) 2000-04-28 2002-07-16 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
US6455424B1 (en) * 2000-08-07 2002-09-24 Micron Technology, Inc. Selective cap layers over recessed polysilicon plugs
US6515888B2 (en) * 2000-08-14 2003-02-04 Matrix Semiconductor, Inc. Low cost three-dimensional memory array
US6376787B1 (en) * 2000-08-24 2002-04-23 Texas Instruments Incorporated Microelectromechanical switch with fixed metal electrode/dielectric interface with a protective cap layer
US6475874B2 (en) * 2000-12-07 2002-11-05 Advanced Micro Devices, Inc. Damascene NiSi metal gate high-k transistor
US6342414B1 (en) * 2000-12-12 2002-01-29 Advanced Micro Devices, Inc. Damascene NiSi metal gate high-k transistor
US6529038B2 (en) 2000-12-13 2003-03-04 Actel Corporation Antifuse programming method
US6664639B2 (en) * 2000-12-22 2003-12-16 Matrix Semiconductor, Inc. Contact and via structure and method of fabrication
US6486065B2 (en) * 2000-12-22 2002-11-26 Matrix Semiconductor, Inc. Method of forming nonvolatile memory device utilizing a hard mask
US6306715B1 (en) * 2001-01-08 2001-10-23 Chartered Semiconductor Manufacturing Ltd. Method to form smaller channel with CMOS device by isotropic etching of the gate materials
US6495437B1 (en) * 2001-02-09 2002-12-17 Advanced Micro Devices, Inc. Low temperature process to locally form high-k gate dielectrics
US6551885B1 (en) * 2001-02-09 2003-04-22 Advanced Micro Devices, Inc. Low temperature process for a thin film transistor
US6403434B1 (en) * 2001-02-09 2002-06-11 Advanced Micro Devices, Inc. Process for manufacturing MOS transistors having elevated source and drain regions and a high-k gate dielectric
US6574145B2 (en) 2001-03-21 2003-06-03 Matrix Semiconductor, Inc. Memory device and method for sensing while programming a non-volatile memory cell
US6552409B2 (en) * 2001-06-05 2003-04-22 Hewlett-Packard Development Company, Lp Techniques for addressing cross-point diode memory arrays
US6704235B2 (en) 2001-07-30 2004-03-09 Matrix Semiconductor, Inc. Anti-fuse memory cell with asymmetric breakdown voltage
US6434060B1 (en) * 2001-07-31 2002-08-13 Hewlett-Packard Company Write pulse limiting for worm storage device
US6584029B2 (en) * 2001-08-09 2003-06-24 Hewlett-Packard Development Company, L.P. One-time programmable memory using fuse/anti-fuse and vertically oriented fuse unit memory cells
US6525953B1 (en) * 2001-08-13 2003-02-25 Matrix Semiconductor, Inc. Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication
US7012297B2 (en) * 2001-08-30 2006-03-14 Micron Technology, Inc. Scalable flash/NV structures and devices with extended endurance
US6559014B1 (en) * 2001-10-15 2003-05-06 Advanced Micro Devices, Inc. Preparation of composite high-K / standard-K dielectrics for semiconductor devices
US6456524B1 (en) * 2001-10-31 2002-09-24 Hewlett-Packard Company Hybrid resistive cross point memory cell arrays and methods of making the same
US6549447B1 (en) * 2001-10-31 2003-04-15 Peter Fricke Memory cell structure
US6514808B1 (en) * 2001-11-30 2003-02-04 Motorola, Inc. Transistor having a high K dielectric and short gate length and method therefor
US6534841B1 (en) * 2001-12-14 2003-03-18 Hewlett-Packard Company Continuous antifuse material in memory structure
US7038248B2 (en) * 2002-02-15 2006-05-02 Sandisk Corporation Diverse band gap energy level semiconductor device
US6586349B1 (en) * 2002-02-21 2003-07-01 Advanced Micro Devices, Inc. Integrated process for fabrication of graded composite dielectric material layers for semiconductor devices
US6451641B1 (en) * 2002-02-27 2002-09-17 Advanced Micro Devices, Inc. Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material
US20040108573A1 (en) 2002-03-13 2004-06-10 Matrix Semiconductor, Inc. Use in semiconductor devices of dielectric antifuses grown on silicide
US6451647B1 (en) * 2002-03-18 2002-09-17 Advanced Micro Devices, Inc. Integrated plasma etch of gate and gate dielectric and low power plasma post gate etch removal of high-K residual
US6661691B2 (en) * 2002-04-02 2003-12-09 Hewlett-Packard Development Company, L.P. Interconnection structure and methods
US6906361B2 (en) * 2002-04-08 2005-06-14 Guobiao Zhang Peripheral circuits of electrically programmable three-dimensional memory
US6617639B1 (en) * 2002-06-21 2003-09-09 Advanced Micro Devices, Inc. Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling
US7081377B2 (en) 2002-06-27 2006-07-25 Sandisk 3D Llc Three-dimensional memory
US6946719B2 (en) 2003-12-03 2005-09-20 Matrix Semiconductor, Inc Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide
JP2006511965A (ja) 2002-12-19 2006-04-06 マトリックス セミコンダクター インコーポレイテッド 高密度不揮発性メモリを製作するための改良された方法
US8637366B2 (en) 2002-12-19 2014-01-28 Sandisk 3D Llc Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
US7285464B2 (en) 2002-12-19 2007-10-23 Sandisk 3D Llc Nonvolatile memory cell comprising a reduced height vertical diode
US20060249753A1 (en) * 2005-05-09 2006-11-09 Matrix Semiconductor, Inc. High-density nonvolatile memory array fabricated at low temperature comprising semiconductor diodes
US7606059B2 (en) * 2003-03-18 2009-10-20 Kabushiki Kaisha Toshiba Three-dimensional programmable resistance memory device with a read/write circuit stacked under a memory cell array
US6879505B2 (en) 2003-03-31 2005-04-12 Matrix Semiconductor, Inc. Word line arrangement having multi-layer word line segments for three-dimensional memory array
US6690597B1 (en) * 2003-04-24 2004-02-10 Hewlett-Packard Development Company, L.P. Multi-bit PROM memory cell
US7291878B2 (en) * 2003-06-03 2007-11-06 Hitachi Global Storage Technologies Netherlands B.V. Ultra low-cost solid-state memory
JP5015420B2 (ja) * 2003-08-15 2012-08-29 旺宏電子股▲ふん▼有限公司 プログラマブル消去不要メモリに対するプログラミング方法
US6937509B2 (en) * 2003-09-08 2005-08-30 Hewlett-Packard Development Company, L.P. Data storage device and method of forming the same

Also Published As

Publication number Publication date
KR20080081243A (ko) 2008-09-09
ATE490541T1 (de) 2010-12-15
EP1899978A1 (en) 2008-03-19
US20070002603A1 (en) 2007-01-04
JP2008545276A (ja) 2008-12-11
CN101258558A (zh) 2008-09-03
EP1899978B1 (en) 2010-12-01
WO2007005273A1 (en) 2007-01-11
KR101226172B1 (ko) 2013-01-25
DE602006018606D1 (de) 2011-01-13
US7453755B2 (en) 2008-11-18

Similar Documents

Publication Publication Date Title
TW200721181A (en) Memory cell with high-k antifuse for reverse bias programming
TW200635015A (en) Changing chip function based on fuse states
TW200702996A (en) Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
GB2432700A (en) Polymer memory with variable data retention time
WO2007061667A3 (en) Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits
TWI317987B (en) Field- effect transistors with spin- dependent output characteristics and their nonvolatile memory applications
TW200702422A (en) Aryl-ethylene substituted aromatic compounds and their use as organic semiconductors
TW200802390A (en) Programmable cell
TW200605334A (en) Single poly non-volatile memory
WO2006107413A3 (en) Interlayer dielectric under stress for an integrated circuit
BRPI0414763A (pt) utilização de identificação por rádio-freqüência
TW200943304A (en) Low Vt antifuse device
TW200634822A (en) Repair control circuit of semiconductor memory device with reduced size
WO2005117102A3 (en) Low-voltage single-layer polysilicon eeprom memory cell
WO2007143424A3 (en) A method for programming and erasing an array of nmos eeprom cells that minimize bit disturbances and voltage withstand requirements for the memory array and supporting circuits
TW200705606A (en) Memory cell and manufacturing methods
AU2003282668A1 (en) One-time-programmable bit cell with latch circuit having selectively programmable floating gate transistors
WO2007014117A3 (en) Non-volatile memory
TW200504755A (en) Nonvolatile memory cells with buried channel transistors
TW200723507A (en) Gated diode nonvolatile memory cell array
WO2007111830A3 (en) Different transistor gate oxides in an integrated circuit
AU2003218166A8 (en) Mapping data masks in hardware by controller programming
MY134505A (en) Using an mos select gate for a phase change memory
AU2003264084A1 (en) Semiconductor memory with vertical memory transistors in a cell field arrangement with 1-2f2 cells
DE60217120D1 (de) Zellenanordnung mit Bipolar-Auswahl-Transistor und Herstellungsverfahren