TW200715195A - Memory card using flash memory and controlling method thereof - Google Patents

Memory card using flash memory and controlling method thereof

Info

Publication number
TW200715195A
TW200715195A TW095121916A TW95121916A TW200715195A TW 200715195 A TW200715195 A TW 200715195A TW 095121916 A TW095121916 A TW 095121916A TW 95121916 A TW95121916 A TW 95121916A TW 200715195 A TW200715195 A TW 200715195A
Authority
TW
Taiwan
Prior art keywords
memory
centralized
controlling method
block
management information
Prior art date
Application number
TW095121916A
Other languages
English (en)
Chinese (zh)
Other versions
TWI317099B (https=
Inventor
Takashi Oshima
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200715195A publication Critical patent/TW200715195A/zh
Application granted granted Critical
Publication of TWI317099B publication Critical patent/TWI317099B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1417—Boot up procedures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Debugging And Monitoring (AREA)
TW095121916A 2005-07-01 2006-06-19 Memory card using flash memory and controlling method thereof TW200715195A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005193958A JP2007011872A (ja) 2005-07-01 2005-07-01 メモリカードとその制御方法

Publications (2)

Publication Number Publication Date
TW200715195A true TW200715195A (en) 2007-04-16
TWI317099B TWI317099B (https=) 2009-11-11

Family

ID=37591158

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095121916A TW200715195A (en) 2005-07-01 2006-06-19 Memory card using flash memory and controlling method thereof

Country Status (4)

Country Link
US (1) US7519876B2 (https=)
JP (1) JP2007011872A (https=)
KR (1) KR100757128B1 (https=)
TW (1) TW200715195A (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4460967B2 (ja) 2004-07-23 2010-05-12 株式会社東芝 メモリカード、不揮発性半導体メモリ、及び半導体メモリの制御方法
JP2007011872A (ja) 2005-07-01 2007-01-18 Toshiba Corp メモリカードとその制御方法
KR100780963B1 (ko) * 2006-11-03 2007-12-03 삼성전자주식회사 메모리 카드 및 메모리 카드의 구동 방법
US7861139B2 (en) * 2007-01-26 2010-12-28 Micron Technology, Inc. Programming management data for NAND memories
JP5142685B2 (ja) 2007-11-29 2013-02-13 株式会社東芝 メモリシステム
KR101492116B1 (ko) * 2008-01-24 2015-02-09 삼성디스플레이 주식회사 커넥터 및 이를 갖는 표시장치
TWI467579B (zh) * 2011-01-14 2015-01-01 Mstar Semiconductor Inc 電子裝置及其記憶體控制方法以及相關電腦可讀取儲存媒體
JP7143735B2 (ja) * 2018-11-15 2022-09-29 Tdk株式会社 メモリコントローラ、及びメモリシステム

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69421103T2 (de) * 1993-01-22 2000-06-08 Matsushita Electric Industrial Co., Ltd. Programmgesteuertes Prozessor
JPH06332795A (ja) * 1993-05-18 1994-12-02 Sansei Denshi Japan Kk 電気的消去可能な不揮発性メモリの制御方法及びシステム
JP3472008B2 (ja) 1996-01-16 2003-12-02 株式会社東芝 フラッシュメモリ管理方法
US6330028B1 (en) * 1996-02-15 2001-12-11 Casio Computer Co., Ltd. Electronic image pickup device which is operable even when management information related to recording/reproducing image data is not readable
JP3718578B2 (ja) * 1997-06-25 2005-11-24 ソニー株式会社 メモリ管理方法及びメモリ管理装置
JPH11185459A (ja) * 1997-12-24 1999-07-09 Sony Corp 記録システム、記録装置
KR100429179B1 (ko) * 1998-07-01 2004-06-16 엘지전자 주식회사 광기록매체의결함영역관리장치및그방법
US6407949B1 (en) 1999-12-17 2002-06-18 Qualcomm, Incorporated Mobile communication device having integrated embedded flash and SRAM memory
IT1318979B1 (it) * 2000-10-06 2003-09-19 St Microelectronics Srl Architettura di memoria a semiconduttore
JP4323707B2 (ja) * 2000-10-25 2009-09-02 富士通マイクロエレクトロニクス株式会社 フラッシュメモリの欠陥管理方法
TW539950B (en) 2000-12-28 2003-07-01 Sony Corp Data recording device and data write method for flash memory
KR100416029B1 (ko) * 2001-06-26 2004-01-24 삼성전자주식회사 시프트 리던던시 회로를 갖는 반도체 메모리 장치
JP2003140980A (ja) 2001-10-31 2003-05-16 Hitachi Ltd 記録装置
US6707749B2 (en) 2002-08-14 2004-03-16 Intel Corporation Enabling an interim density for top boot flash memories
KR20040038262A (ko) * 2002-10-31 2004-05-08 주식회사 현대시스콤 플래시 디스크를 이용한 멀티 부팅 방법
US7330409B2 (en) * 2003-01-13 2008-02-12 Samsung Electronics Co., Ltd. Disc with temporary defect management area, and disc defect management method and apparatus therefor
JP3912355B2 (ja) 2003-10-14 2007-05-09 ソニー株式会社 データ管理装置、データ管理方法、不揮発性メモリ、不揮発性メモリを有する記憶装置及びデータ処理システム
JP4460967B2 (ja) 2004-07-23 2010-05-12 株式会社東芝 メモリカード、不揮発性半導体メモリ、及び半導体メモリの制御方法
JP2007011872A (ja) 2005-07-01 2007-01-18 Toshiba Corp メモリカードとその制御方法

Also Published As

Publication number Publication date
US20070005875A1 (en) 2007-01-04
KR100757128B1 (ko) 2007-09-10
JP2007011872A (ja) 2007-01-18
TWI317099B (https=) 2009-11-11
US7519876B2 (en) 2009-04-14
KR20070003673A (ko) 2007-01-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees