TW200644218A - Multi-chip module and method of manufacture - Google Patents

Multi-chip module and method of manufacture

Info

Publication number
TW200644218A
TW200644218A TW095114265A TW95114265A TW200644218A TW 200644218 A TW200644218 A TW 200644218A TW 095114265 A TW095114265 A TW 095114265A TW 95114265 A TW95114265 A TW 95114265A TW 200644218 A TW200644218 A TW 200644218A
Authority
TW
Taiwan
Prior art keywords
semiconductor chip
chip module
manufacture
bonding pads
chip
Prior art date
Application number
TW095114265A
Other languages
English (en)
Inventor
John Yan
Yong Du
Bruce E Symons
Original Assignee
Spansion Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion Llc filed Critical Spansion Llc
Publication of TW200644218A publication Critical patent/TW200644218A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/732Location after the connecting process
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    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
TW095114265A 2005-04-27 2006-04-21 Multi-chip module and method of manufacture TW200644218A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/116,571 US7163839B2 (en) 2005-04-27 2005-04-27 Multi-chip module and method of manufacture

Publications (1)

Publication Number Publication Date
TW200644218A true TW200644218A (en) 2006-12-16

Family

ID=36595509

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095114265A TW200644218A (en) 2005-04-27 2006-04-21 Multi-chip module and method of manufacture

Country Status (7)

Country Link
US (1) US7163839B2 (zh)
EP (1) EP1878048A2 (zh)
JP (2) JP2008539588A (zh)
KR (1) KR101000111B1 (zh)
CN (1) CN101160656A (zh)
TW (1) TW200644218A (zh)
WO (1) WO2006115649A2 (zh)

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US7163839B2 (en) 2007-01-16
KR101000111B1 (ko) 2010-12-10
JP2008539588A (ja) 2008-11-13
JP2011082586A (ja) 2011-04-21
WO2006115649A2 (en) 2006-11-02
KR20070118149A (ko) 2007-12-13
WO2006115649A3 (en) 2007-06-28

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