TW200640132A - Delay circuit and ring oscillator - Google Patents

Delay circuit and ring oscillator

Info

Publication number
TW200640132A
TW200640132A TW095103205A TW95103205A TW200640132A TW 200640132 A TW200640132 A TW 200640132A TW 095103205 A TW095103205 A TW 095103205A TW 95103205 A TW95103205 A TW 95103205A TW 200640132 A TW200640132 A TW 200640132A
Authority
TW
Taiwan
Prior art keywords
transistor
conductivity
level
input signal
delay circuit
Prior art date
Application number
TW095103205A
Other languages
English (en)
Inventor
Hirohisa Suzuki
Kazuo Hasegawa
Eiji Akama
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Publication of TW200640132A publication Critical patent/TW200640132A/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H03K5/134—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices with field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/354—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00026—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00156—Layout of the delay element using opamps, comparators, voltage multipliers or other analog building blocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00195—Layout of the delay element using FET's
    • H03K2005/00202—Layout of the delay element using FET's using current mirrors

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Logic Circuits (AREA)
TW095103205A 2005-02-02 2006-01-26 Delay circuit and ring oscillator TW200640132A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005026716A JP2006217172A (ja) 2005-02-02 2005-02-02 遅延回路及びそれを用いたリングオシレータ

Publications (1)

Publication Number Publication Date
TW200640132A true TW200640132A (en) 2006-11-16

Family

ID=36907908

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095103205A TW200640132A (en) 2005-02-02 2006-01-26 Delay circuit and ring oscillator

Country Status (5)

Country Link
US (1) US7288978B2 (zh)
JP (1) JP2006217172A (zh)
KR (1) KR100667127B1 (zh)
CN (1) CN1815888A (zh)
TW (1) TW200640132A (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7667514B2 (en) 2007-01-10 2010-02-23 Seiko Epson Corporation Delay circuit and electronic device including delay circuit
US8816658B1 (en) * 2007-09-04 2014-08-26 Marvell International Ltd. Low-dropout converters with feedback compensation
JP5298527B2 (ja) * 2007-12-24 2013-09-25 富士通セミコンダクター株式会社 可変遅延回路及びその制御方法
CN101286733B (zh) * 2008-05-26 2010-06-09 北京中星微电子有限公司 一种低压低功耗振荡器
US7924102B2 (en) * 2009-02-23 2011-04-12 Qualcomm Incorporated Symmetric load delay cell oscillator
TWI479803B (zh) * 2012-03-14 2015-04-01 Novatek Microelectronics Corp 輸出級電路
CN103326670B (zh) * 2012-03-22 2017-03-01 联咏科技股份有限公司 输出级电路
US9766643B1 (en) 2014-04-02 2017-09-19 Marvell International Ltd. Voltage regulator with stability compensation
US9692396B2 (en) * 2015-05-13 2017-06-27 Qualcomm Incorporated Ring oscillator architecture with controlled sensitivity to supply voltage
KR102567922B1 (ko) * 2018-07-03 2023-08-18 에스케이하이닉스 주식회사 지연회로 및 이를 이용한 반도체시스템
CN112054788B (zh) * 2019-06-05 2023-02-03 雅特力科技(重庆)有限公司 延迟电路以及具备延迟电路的电子系统
US11451220B2 (en) 2020-11-23 2022-09-20 Silanna Asia Pte Ltd Noise-tolerant delay circuit

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5081380A (en) * 1989-10-16 1992-01-14 Advanced Micro Devices, Inc. Temperature self-compensated time delay circuits
JP3412937B2 (ja) * 1994-12-28 2003-06-03 三菱電機エンジニアリング株式会社 リングオシレータの電流制御回路
JP3686174B2 (ja) * 1996-07-30 2005-08-24 株式会社ルネサステクノロジ 半導体集積回路装置
US5748542A (en) * 1996-12-13 1998-05-05 Micron Technology, Inc. Circuit and method for providing a substantially constant time delay over a range of supply voltages
JPH11136295A (ja) 1997-10-29 1999-05-21 Aiphone Co Ltd バイフェーズ符号伝送方式
US6163195A (en) * 1998-05-26 2000-12-19 Altera Corporation Temperature compensated delay chain
US6262616B1 (en) * 1999-10-08 2001-07-17 Cirrus Logic, Inc. Open loop supply independent digital/logic delay circuit
EP1330051B1 (en) * 2000-10-26 2009-12-16 Fujitsu Limited Pulse width control circuit
US6426661B1 (en) * 2001-08-20 2002-07-30 International Business Machines Corporation Clock distribution with constant delay clock buffer circuit
US6992534B2 (en) * 2003-10-14 2006-01-31 Micron Technology, Inc. Circuits and methods of temperature compensation for refresh oscillator
US7230467B1 (en) * 2005-03-24 2007-06-12 Cirrus Logic, Inc. Constant edge generation circuits and methods and systems using the same

Also Published As

Publication number Publication date
KR20060088833A (ko) 2006-08-07
US7288978B2 (en) 2007-10-30
KR100667127B1 (ko) 2007-01-12
US20060197572A1 (en) 2006-09-07
JP2006217172A (ja) 2006-08-17
CN1815888A (zh) 2006-08-09

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