TW200637149A - Clock converting device and testing device - Google Patents

Clock converting device and testing device

Info

Publication number
TW200637149A
TW200637149A TW095110662A TW95110662A TW200637149A TW 200637149 A TW200637149 A TW 200637149A TW 095110662 A TW095110662 A TW 095110662A TW 95110662 A TW95110662 A TW 95110662A TW 200637149 A TW200637149 A TW 200637149A
Authority
TW
Taiwan
Prior art keywords
clock
pattern signal
converting device
rate
variable
Prior art date
Application number
TW095110662A
Other languages
English (en)
Inventor
Noriaki Chiba
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of TW200637149A publication Critical patent/TW200637149A/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31727—Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
TW095110662A 2005-03-28 2006-03-28 Clock converting device and testing device TW200637149A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005093022A JP4621050B2 (ja) 2005-03-28 2005-03-28 クロック乗替装置、及び試験装置

Publications (1)

Publication Number Publication Date
TW200637149A true TW200637149A (en) 2006-10-16

Family

ID=37053299

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095110662A TW200637149A (en) 2005-03-28 2006-03-28 Clock converting device and testing device

Country Status (5)

Country Link
US (1) US7549101B2 (zh)
JP (1) JP4621050B2 (zh)
DE (1) DE112006000788T5 (zh)
TW (1) TW200637149A (zh)
WO (1) WO2006104042A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI400461B (zh) * 2008-09-17 2013-07-01 Advantest Corp 測試裝置以及領域間同步方法
TWI467187B (zh) * 2012-05-14 2015-01-01 Broadcom Corp 用於標準符合性抖動容限測試的晶載干擾

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101455023B (zh) * 2006-03-31 2011-07-20 安立股份有限公司 数据识别装置和错误测定装置
EP2360488B1 (en) 2007-03-20 2013-01-23 Rambus Inc. Integrated circuit having receiver jitter tolerance ("JTOL") measurement
KR20100005090A (ko) * 2007-03-27 2010-01-13 가부시키가이샤 어드밴티스트 시험 장치
US7801205B2 (en) * 2007-08-07 2010-09-21 Advantest Corporation Jitter injection circuit, electronics device, and test apparatus
US8195972B2 (en) * 2009-12-01 2012-06-05 Texas Instruments Incorporated Jitter precorrection filter in time-average-frequency clocked systems
TWI507877B (zh) * 2013-04-15 2015-11-11 Winbond Electronics Corp 介面電路及串列介面記憶體的存取模式選擇方法
US10074417B2 (en) 2014-11-20 2018-09-11 Rambus Inc. Memory systems and methods for improved power management
CN117375642B (zh) * 2023-12-06 2024-04-02 杭州长川科技股份有限公司 信号发送装置、测试机及其信号输出方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03219739A (ja) * 1990-01-24 1991-09-27 Advantest Corp パターン同期回路
JP3233773B2 (ja) * 1994-03-18 2001-11-26 富士通株式会社 試験回路、自己試験方法及び通常試験方法
JP2679622B2 (ja) * 1994-05-18 1997-11-19 日本電気株式会社 クロック位相制御回路
US6032282A (en) * 1994-09-19 2000-02-29 Advantest Corp. Timing edge forming circuit for IC test system
JP3466774B2 (ja) * 1995-05-17 2003-11-17 株式会社アドバンテスト 半導体試験装置における周期発生回路
US6279090B1 (en) * 1998-09-03 2001-08-21 Micron Technology, Inc. Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device
JP4320139B2 (ja) * 2001-11-13 2009-08-26 株式会社アドバンテスト タイミング発生装置、及び試験装置
JP4567974B2 (ja) * 2002-01-18 2010-10-27 株式会社アドバンテスト 試験装置
JP3790741B2 (ja) * 2002-12-17 2006-06-28 アンリツ株式会社 ジッタ測定装置およびジッタ測定方法
JP4323873B2 (ja) * 2003-06-13 2009-09-02 富士通株式会社 入出力インタフェース回路
JP2005337740A (ja) * 2004-05-24 2005-12-08 Matsushita Electric Ind Co Ltd 高速インターフェース回路検査モジュール、高速インターフェース回路検査対象モジュールおよび高速インターフェース回路検査方法
US7184283B2 (en) * 2004-08-09 2007-02-27 System General Corp. Switching frequency jitter having output ripple cancel for power supplies

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI400461B (zh) * 2008-09-17 2013-07-01 Advantest Corp 測試裝置以及領域間同步方法
TWI467187B (zh) * 2012-05-14 2015-01-01 Broadcom Corp 用於標準符合性抖動容限測試的晶載干擾

Also Published As

Publication number Publication date
JP4621050B2 (ja) 2011-01-26
JP2006279336A (ja) 2006-10-12
WO2006104042A1 (ja) 2006-10-05
DE112006000788T5 (de) 2008-02-14
US7549101B2 (en) 2009-06-16
US20070025487A1 (en) 2007-02-01

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