TW200627528A - Dual silicide process to improve device performance - Google Patents
Dual silicide process to improve device performanceInfo
- Publication number
- TW200627528A TW200627528A TW095101573A TW95101573A TW200627528A TW 200627528 A TW200627528 A TW 200627528A TW 095101573 A TW095101573 A TW 095101573A TW 95101573 A TW95101573 A TW 95101573A TW 200627528 A TW200627528 A TW 200627528A
- Authority
- TW
- Taiwan
- Prior art keywords
- type
- device region
- type device
- silicide
- device performance
- Prior art date
Links
- 229910021332 silicide Inorganic materials 0.000 title abstract 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title abstract 7
- 230000009977 dual effect Effects 0.000 title 1
- 239000000463 material Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7845—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being a conductive material, e.g. silicided S/D or Gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823835—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/905,945 US20060163670A1 (en) | 2005-01-27 | 2005-01-27 | Dual silicide process to improve device performance |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200627528A true TW200627528A (en) | 2006-08-01 |
Family
ID=36695883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095101573A TW200627528A (en) | 2005-01-27 | 2006-01-16 | Dual silicide process to improve device performance |
Country Status (6)
Country | Link |
---|---|
US (1) | US20060163670A1 (zh) |
EP (1) | EP1842235A4 (zh) |
JP (1) | JP2008529302A (zh) |
CN (1) | CN100533709C (zh) |
TW (1) | TW200627528A (zh) |
WO (1) | WO2006081012A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI455210B (zh) * | 2006-10-31 | 2014-10-01 | Advanced Micro Devices Inc | 形成包括具有受應力之通道區之場效電晶體之半導體結構之方法 |
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JP2006344713A (ja) * | 2005-06-08 | 2006-12-21 | Renesas Technology Corp | 半導体装置およびその製造方法 |
DE102005030583B4 (de) * | 2005-06-30 | 2010-09-30 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung von Kontaktisolationsschichten und Silizidgebieten mit unterschiedlichen Eigenschaften eines Halbleiterbauelements und Halbleiterbauelement |
JP4880958B2 (ja) * | 2005-09-16 | 2012-02-22 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2007101213A (ja) * | 2005-09-30 | 2007-04-19 | Ricoh Co Ltd | 半導体装置、赤外線センサ、及び半導体装置の製造方法 |
JP4247257B2 (ja) * | 2006-08-29 | 2009-04-02 | 株式会社東芝 | 半導体装置の製造方法 |
US20080070360A1 (en) * | 2006-09-19 | 2008-03-20 | International Business Machines Corporation | Method and structure for forming silicide contacts on embedded silicon germanium regions of cmos devices |
TW200833871A (en) * | 2006-11-17 | 2008-08-16 | Sachem Inc | Selective metal wet etch composition and process |
US8039284B2 (en) * | 2006-12-18 | 2011-10-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual metal silicides for lowering contact resistance |
TW200910526A (en) * | 2007-07-03 | 2009-03-01 | Renesas Tech Corp | Method of manufacturing semiconductor device |
US8263466B2 (en) * | 2007-10-17 | 2012-09-11 | Acorn Technologies, Inc. | Channel strain induced by strained metal in FET source or drain |
US7615831B2 (en) * | 2007-10-26 | 2009-11-10 | International Business Machines Corporation | Structure and method for fabricating self-aligned metal contacts |
US7964923B2 (en) | 2008-01-07 | 2011-06-21 | International Business Machines Corporation | Structure and method of creating entirely self-aligned metallic contacts |
US7749847B2 (en) * | 2008-02-14 | 2010-07-06 | International Business Machines Corporation | CMOS integration scheme employing a silicide electrode and a silicide-germanide alloy electrode |
JP4770885B2 (ja) | 2008-06-30 | 2011-09-14 | ソニー株式会社 | 半導体装置 |
JP5769160B2 (ja) * | 2008-10-30 | 2015-08-26 | 国立大学法人東北大学 | コンタクト形成方法、半導体装置の製造方法、および半導体装置 |
DE102010004230A1 (de) | 2009-01-23 | 2010-10-14 | Qimonda Ag | Integrierter Schaltkreis mit Kontaktstrukturen für P- und N-Dotierte Gebiete und Verfahren zu dessen Herstellung |
JP5493849B2 (ja) * | 2009-12-28 | 2014-05-14 | 株式会社リコー | 温度センサーとそれを用いた生体検知装置 |
US8278200B2 (en) | 2011-01-24 | 2012-10-02 | International Business Machines Corpration | Metal-semiconductor intermixed regions |
JP4771024B2 (ja) * | 2011-04-15 | 2011-09-14 | ソニー株式会社 | 半導体装置の製造方法 |
JPWO2013150571A1 (ja) * | 2012-04-06 | 2015-12-14 | 国立大学法人東北大学 | 半導体装置 |
US8866195B2 (en) * | 2012-07-06 | 2014-10-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | III-V compound semiconductor device having metal contacts and method of making the same |
US20140048888A1 (en) * | 2012-08-17 | 2014-02-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained Structure of a Semiconductor Device |
US9601630B2 (en) | 2012-09-25 | 2017-03-21 | Stmicroelectronics, Inc. | Transistors incorporating metal quantum dots into doped source and drain regions |
US9748356B2 (en) | 2012-09-25 | 2017-08-29 | Stmicroelectronics, Inc. | Threshold adjustment for quantum dot array devices with metal source and drain |
KR20140101218A (ko) | 2013-02-08 | 2014-08-19 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
US9508716B2 (en) * | 2013-03-14 | 2016-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of manufacturing a semiconductor device |
US10002938B2 (en) | 2013-08-20 | 2018-06-19 | Stmicroelectronics, Inc. | Atomic layer deposition of selected molecular clusters |
US9093424B2 (en) | 2013-12-18 | 2015-07-28 | International Business Machines Corporation | Dual silicide integration with laser annealing |
US9177810B2 (en) | 2014-01-29 | 2015-11-03 | International Business Machines Corporation | Dual silicide regions and method for forming the same |
KR102236555B1 (ko) | 2014-11-11 | 2021-04-06 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US9390981B1 (en) | 2015-02-05 | 2016-07-12 | Globalfoundries Inc. | Method of forming a complementary metal oxide semiconductor structure with N-type and P-type field effect transistors having symmetric source/drain junctions and optional dual silicides |
US9564372B2 (en) | 2015-06-16 | 2017-02-07 | International Business Machines Corporation | Dual liner silicide |
US9520363B1 (en) | 2015-08-19 | 2016-12-13 | International Business Machines Corporation | Forming CMOSFET structures with different contact liners |
US9768077B1 (en) | 2016-06-02 | 2017-09-19 | International Business Machines Corporation | Low resistance dual liner contacts for Fin Field-Effect Transistors (FinFETs) |
US10388576B2 (en) | 2016-06-30 | 2019-08-20 | International Business Machines Corporation | Semiconductor device including dual trench epitaxial dual-liner contacts |
US11158543B2 (en) | 2019-07-09 | 2021-10-26 | International Business Machines Corporation | Silicide formation for source/drain contact in a vertical transport field-effect transistor |
US11348839B2 (en) | 2019-07-31 | 2022-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing semiconductor devices with multiple silicide regions |
US11164947B2 (en) | 2020-02-29 | 2021-11-02 | International Business Machines Corporation | Wrap around contact formation for VTFET |
US11615990B2 (en) | 2020-03-24 | 2023-03-28 | International Business Machines Corporation | CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor |
TW202335094A (zh) * | 2022-02-22 | 2023-09-01 | 美商應用材料股份有限公司 | 用於可靠低接觸電阻之導電氧矽化物 |
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US6380024B1 (en) * | 2000-02-07 | 2002-04-30 | Taiwan Semiconductor Manufacturing Company | Method of fabricating an SRAM cell featuring dual silicide gates and four buried contact regions |
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JP3906020B2 (ja) * | 2000-09-27 | 2007-04-18 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6468900B1 (en) * | 2000-12-06 | 2002-10-22 | Advanced Micro Devices, Inc. | Dual layer nickel deposition using a cobalt barrier to reduce surface roughness at silicide/junction interface |
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US20050156208A1 (en) * | 2003-09-30 | 2005-07-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device having multiple silicide types and a method for its fabrication |
US6977194B2 (en) * | 2003-10-30 | 2005-12-20 | International Business Machines Corporation | Structure and method to improve channel mobility by gate electrode stress modification |
JP2005209782A (ja) * | 2004-01-21 | 2005-08-04 | Toshiba Corp | 半導体装置 |
-
2005
- 2005-01-27 US US10/905,945 patent/US20060163670A1/en not_active Abandoned
- 2005-12-21 JP JP2007553101A patent/JP2008529302A/ja active Pending
- 2005-12-21 EP EP05854758A patent/EP1842235A4/en not_active Withdrawn
- 2005-12-21 CN CNB2005800472694A patent/CN100533709C/zh not_active Expired - Fee Related
- 2005-12-21 WO PCT/US2005/046097 patent/WO2006081012A1/en active Application Filing
-
2006
- 2006-01-16 TW TW095101573A patent/TW200627528A/zh unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI455210B (zh) * | 2006-10-31 | 2014-10-01 | Advanced Micro Devices Inc | 形成包括具有受應力之通道區之場效電晶體之半導體結構之方法 |
Also Published As
Publication number | Publication date |
---|---|
CN101124671A (zh) | 2008-02-13 |
EP1842235A1 (en) | 2007-10-10 |
WO2006081012A1 (en) | 2006-08-03 |
EP1842235A4 (en) | 2009-03-25 |
JP2008529302A (ja) | 2008-07-31 |
US20060163670A1 (en) | 2006-07-27 |
CN100533709C (zh) | 2009-08-26 |
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