TW200623646A - Delay locked loop for use in semiconductor memory device and method thereof - Google Patents

Delay locked loop for use in semiconductor memory device and method thereof

Info

Publication number
TW200623646A
TW200623646A TW094118624A TW94118624A TW200623646A TW 200623646 A TW200623646 A TW 200623646A TW 094118624 A TW094118624 A TW 094118624A TW 94118624 A TW94118624 A TW 94118624A TW 200623646 A TW200623646 A TW 200623646A
Authority
TW
Taiwan
Prior art keywords
delay locked
delay
clock signal
signal
locked loop
Prior art date
Application number
TW094118624A
Other languages
English (en)
Other versions
TWI269533B (en
Inventor
Hyun-Woo Lee
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200623646A publication Critical patent/TW200623646A/zh
Application granted granted Critical
Publication of TWI269533B publication Critical patent/TWI269533B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Pulse Circuits (AREA)
TW094118624A 2004-12-20 2005-06-06 Delay locked loop for use in semiconductor memory device and method thereof TWI269533B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040108542A KR100639617B1 (ko) 2004-12-20 2004-12-20 반도체 기억 소자에서의 지연 고정 루프 및 그의 클럭록킹 방법

Publications (2)

Publication Number Publication Date
TW200623646A true TW200623646A (en) 2006-07-01
TWI269533B TWI269533B (en) 2006-12-21

Family

ID=36594897

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094118624A TWI269533B (en) 2004-12-20 2005-06-06 Delay locked loop for use in semiconductor memory device and method thereof

Country Status (4)

Country Link
US (1) US7368963B2 (zh)
KR (1) KR100639617B1 (zh)
CN (1) CN1794580B (zh)
TW (1) TWI269533B (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100562655B1 (ko) * 2005-02-28 2006-03-20 주식회사 하이닉스반도체 반도체 기억 소자의 동작 제한 필터 및 그 방법
US7702942B2 (en) * 2005-09-12 2010-04-20 Northern Lights Semiconductor Corp. Method for generating adjustable MRAM timing signals
US7982511B2 (en) * 2006-02-09 2011-07-19 Hynix Semiconductor Inc. DLL circuit and method of controlling the same
KR100736623B1 (ko) * 2006-05-08 2007-07-09 엘지전자 주식회사 수직형 발광 소자 및 그 제조방법
JP4106383B2 (ja) * 2006-06-08 2008-06-25 インターナショナル・ビジネス・マシーンズ・コーポレーション 遅延比率調整回路、遅延パルス生成回路及びパルス幅変調パルス信号発生装置。
KR100809692B1 (ko) * 2006-08-01 2008-03-06 삼성전자주식회사 작은 지터를 갖는 지연동기 루프 회로 및 이의 지터감소방법
KR100854457B1 (ko) * 2006-12-29 2008-08-27 주식회사 하이닉스반도체 지연고정루프
KR100915817B1 (ko) * 2007-10-09 2009-09-07 주식회사 하이닉스반도체 Ｄｌｌ 회로
TWI395125B (zh) * 2009-07-14 2013-05-01 Sonix Technology Co Ltd 電容式觸控感應電路
CN101621291B (zh) * 2009-08-05 2013-06-12 松翰科技股份有限公司 电容式触控感应电路
CN103391102B (zh) * 2012-05-07 2017-10-03 北京大学 可容软错误的扫描链触发器
CN103297046B (zh) * 2013-05-09 2018-04-13 英特格灵芯片(天津)有限公司 一种锁相环及其时钟产生方法和电路
US9036434B1 (en) * 2013-10-31 2015-05-19 Nanya Technology Corporation Random access memory and method of adjusting read timing thereof
CN106487379A (zh) * 2015-08-25 2017-03-08 晨星半导体股份有限公司 延迟锁定电路与相关的控制方法
JP6596051B2 (ja) * 2016-10-28 2019-10-23 インテグレイテッド シリコン ソリューション インコーポレイテッド 同期半導体集積回路内のクロック式指令タイミング調節
US10706916B1 (en) * 2019-04-03 2020-07-07 Synopsys, Inc. Method and apparatus for integrated level-shifter and memory clock
US10923177B1 (en) * 2019-12-23 2021-02-16 Nanya Technology Corporation Delay-locked loop, memory device, and method for operating delay-locked loop
CN113746475B (zh) * 2020-05-28 2023-12-01 华邦电子股份有限公司 延迟锁相回路装置及其操作方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224718B1 (ko) * 1996-10-30 1999-10-15 윤종용 동기식 메모리장치의 내부 클락 발생기
JP4057084B2 (ja) * 1996-12-26 2008-03-05 株式会社ルネサステクノロジ 半導体記憶装置
US6100736A (en) * 1997-06-05 2000-08-08 Cirrus Logic, Inc Frequency doubler using digital delay lock loop
JPH11110065A (ja) * 1997-10-03 1999-04-23 Mitsubishi Electric Corp 内部クロック信号発生回路
KR100507877B1 (ko) * 2002-03-28 2005-08-18 주식회사 하이닉스반도체 면적 축소용 알디엘엘 회로
KR100500929B1 (ko) * 2002-11-27 2005-07-14 주식회사 하이닉스반도체 지연 고정 루프 회로
US7046042B1 (en) * 2003-08-11 2006-05-16 Marvell Semiconductor Israel Ltd. Phase detector

Also Published As

Publication number Publication date
KR100639617B1 (ko) 2006-10-31
US7368963B2 (en) 2008-05-06
TWI269533B (en) 2006-12-21
US20060132203A1 (en) 2006-06-22
CN1794580B (zh) 2011-11-16
CN1794580A (zh) 2006-06-28
KR20060069945A (ko) 2006-06-23

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees