TW200615781A - Method and related apparatus for configuring lanes of each port - Google Patents
Method and related apparatus for configuring lanes of each portInfo
- Publication number
- TW200615781A TW200615781A TW094118790A TW94118790A TW200615781A TW 200615781 A TW200615781 A TW 200615781A TW 094118790 A TW094118790 A TW 094118790A TW 94118790 A TW94118790 A TW 94118790A TW 200615781 A TW200615781 A TW 200615781A
- Authority
- TW
- Taiwan
- Prior art keywords
- lane
- ports
- port
- lanes
- related apparatus
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000013507 mapping Methods 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/27—Built-in tests
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US52281204P | 2004-11-09 | 2004-11-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200615781A true TW200615781A (en) | 2006-05-16 |
TWI273427B TWI273427B (en) | 2007-02-11 |
Family
ID=35476257
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094118790A TWI273427B (en) | 2004-11-09 | 2005-06-07 | Method and related apparatus for configuring lanes of each port |
TW094118789A TWI273259B (en) | 2004-11-09 | 2005-06-07 | Built-in test architecture |
TW094122419A TWI285813B (en) | 2004-11-09 | 2005-07-01 | Data receiving apparatus of a PCI express device |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094118789A TWI273259B (en) | 2004-11-09 | 2005-06-07 | Built-in test architecture |
TW094122419A TWI285813B (en) | 2004-11-09 | 2005-07-01 | Data receiving apparatus of a PCI express device |
Country Status (3)
Country | Link |
---|---|
US (2) | US7613959B2 (zh) |
CN (4) | CN100346310C (zh) |
TW (3) | TWI273427B (zh) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7930377B2 (en) | 2004-04-23 | 2011-04-19 | Qlogic, Corporation | Method and system for using boot servers in networks |
US7669190B2 (en) * | 2004-05-18 | 2010-02-23 | Qlogic, Corporation | Method and system for efficiently recording processor events in host bus adapters |
US7577772B2 (en) * | 2004-09-08 | 2009-08-18 | Qlogic, Corporation | Method and system for optimizing DMA channel selection |
US20060064531A1 (en) * | 2004-09-23 | 2006-03-23 | Alston Jerald K | Method and system for optimizing data transfer in networks |
US7676611B2 (en) * | 2004-10-01 | 2010-03-09 | Qlogic, Corporation | Method and system for processing out of orders frames |
US7392437B2 (en) * | 2005-01-20 | 2008-06-24 | Qlogic, Corporation | Method and system for testing host bus adapters |
KR100738351B1 (ko) | 2005-12-01 | 2007-07-12 | 한국전자통신연구원 | 디스크램블링 기능을 포함하는 피씨아이 익스프레스 패킷검출 장치 |
US7957294B2 (en) * | 2005-12-01 | 2011-06-07 | Electronics And Telecommunications Research Institute | PCI express packet filter including descrambler |
US7836352B2 (en) * | 2006-06-30 | 2010-11-16 | Intel Corporation | Method and apparatus for improving high availability in a PCI express link through predictive failure analysis |
US8184758B2 (en) * | 2008-12-16 | 2012-05-22 | Hewlett-Packard Development Company, L.P. | Method and apparatus for detecting electrical idle |
JP5266164B2 (ja) * | 2009-08-25 | 2013-08-21 | ルネサスエレクトロニクス株式会社 | データ受信装置 |
CN101706538B (zh) * | 2009-09-15 | 2012-01-04 | 东南大学 | 显示测试图形多通道时钟发生器 |
JP5426326B2 (ja) * | 2009-11-09 | 2014-02-26 | ルネサスエレクトロニクス株式会社 | データ受信装置、データ受信方法、及びプログラム |
US8806093B2 (en) * | 2010-04-01 | 2014-08-12 | Intel Corporation | Method, apparatus, and system for enabling a deterministic interface |
US8750176B2 (en) * | 2010-12-22 | 2014-06-10 | Apple Inc. | Methods and apparatus for the intelligent association of control symbols |
WO2013060361A1 (en) * | 2011-10-25 | 2013-05-02 | Advantest (Singapore) Pte. Ltd. | Automatic test equipment |
US8572300B2 (en) * | 2011-10-26 | 2013-10-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Physical coding sublayer (PCS) architecture for synchronizing data between different reference clocks |
US8897398B2 (en) | 2012-01-27 | 2014-11-25 | Apple Inc. | Methods and apparatus for error rate estimation |
US9838226B2 (en) | 2012-01-27 | 2017-12-05 | Apple Inc. | Methods and apparatus for the intelligent scrambling of control symbols |
US8879680B2 (en) * | 2012-11-06 | 2014-11-04 | Ati Technologies Ulc | Adaptive clock mismatch compensation symbol insertion in signal transmissions |
US9213355B2 (en) | 2012-11-06 | 2015-12-15 | Advanced Micro Devices, Inc. | Selective insertion of clock mismatch compensation symbols in signal transmissions based on a receiver's compensation capability |
US9450790B2 (en) | 2013-01-31 | 2016-09-20 | Apple Inc. | Methods and apparatus for enabling and disabling scrambling of control symbols |
US9210010B2 (en) | 2013-03-15 | 2015-12-08 | Apple, Inc. | Methods and apparatus for scrambling symbols over multi-lane serial interfaces |
US8917194B2 (en) | 2013-03-15 | 2014-12-23 | Apple, Inc. | Methods and apparatus for context based line coding |
KR20150029213A (ko) | 2013-09-09 | 2015-03-18 | 삼성전자주식회사 | 다양한 테스트 패턴을 획득하는 자체 테스트 회로를 포함하는 시스템 온 칩 및 그것의 자체 테스트 방법 |
KR102108380B1 (ko) | 2014-02-04 | 2020-05-08 | 삼성전자주식회사 | 송신 데이터 오류를 복구하도록 작동하는 인터페이스 회로 |
US9766692B2 (en) * | 2014-08-01 | 2017-09-19 | Apple Inc. | Physical layer for peripheral interconnect with reduced power and area |
CN105448221A (zh) * | 2015-12-29 | 2016-03-30 | 上海中航光电子有限公司 | 显示装置及其测试方法 |
TW201919347A (zh) * | 2017-09-21 | 2019-05-16 | 瑞鼎科技股份有限公司 | 應用於具有嵌入式時脈之數位通訊系統的偵錯電路 |
US10866278B2 (en) | 2019-03-28 | 2020-12-15 | Intel Corporation | Methods and apparatus for performing design for debug via protocol interface |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9008151D0 (en) * | 1990-04-10 | 1990-06-06 | British Telecomm | Data communication |
US5574731A (en) * | 1995-02-22 | 1996-11-12 | National Semiconductor Corporation | Set/reset scan flip-flops |
JP3277887B2 (ja) * | 1998-06-19 | 2002-04-22 | 日本電気株式会社 | 送受信方法、送受信回路および送受信回路の制御方法 |
US6256700B1 (en) * | 1999-03-30 | 2001-07-03 | Dell Usa, L.P. | Bus/port switching system and method for a computer |
GB9920077D0 (en) * | 1999-08-24 | 1999-10-27 | Sgs Thomson Microelectronics | Scan latch circuit |
US7137136B1 (en) * | 1999-09-10 | 2006-11-14 | Canon Kabushiki Kaisha | Signal processing apparatus and method, signal processing system, and printer |
US6633946B1 (en) * | 1999-09-28 | 2003-10-14 | Sun Microsystems, Inc. | Flexible switch-based I/O system interconnect |
US6574758B1 (en) * | 2000-03-10 | 2003-06-03 | Cisco Technology, Inc. | Testing a bus coupled between two electronic devices |
EP1235432A1 (fr) * | 2001-02-27 | 2002-08-28 | Koninklijke Philips Electronics N.V. | Système de réception de signaux cryptés multi-opérateurs à encombrement et coût réduits |
DE60137834D1 (de) * | 2001-04-23 | 2009-04-16 | Hewlett Packard Co | Rechner, Verfahren zur Verbindung von Geräten mit Bussteuereinrichtungen, Verfahren zur Bandbreitenzuordnung einer Mehrzahl von Datenbussteuereinrichtungen und Vorrichtung dafür |
JP3795822B2 (ja) * | 2002-04-03 | 2006-07-12 | Necエレクトロニクス株式会社 | 組込み自己テスト回路及び設計検証方法 |
US7062688B2 (en) * | 2002-07-16 | 2006-06-13 | Sun Microsystems, Inc. | Updating high speed parallel I/O interfaces based on counters |
KR100487535B1 (ko) * | 2002-08-14 | 2005-05-03 | 삼성전자주식회사 | 다른 종류의 반도체 장치들을 동시에 테스트하는 시스템 |
JP3544203B2 (ja) * | 2002-08-30 | 2004-07-21 | 沖電気工業株式会社 | テスト回路、そのテスト回路を内蔵した半導体集積回路装置、及びそのテスト方法 |
CN1318965C (zh) * | 2002-09-10 | 2007-05-30 | 华邦电子股份有限公司 | 测试式样产生方法与其装置 |
CN1505282A (zh) * | 2002-11-29 | 2004-06-16 | 上海叶鑫贸易有限公司 | 前向纠错编码器 |
CN1219401C (zh) * | 2003-02-14 | 2005-09-14 | 清华大学 | 一种有线数字电视广播中防止非法广播的方法 |
CN1536486A (zh) * | 2003-04-04 | 2004-10-13 | 上海华园微电子技术有限公司 | 可自测试的带微处理器的智能卡芯片 |
-
2005
- 2005-06-07 TW TW094118790A patent/TWI273427B/zh active
- 2005-06-07 TW TW094118789A patent/TWI273259B/zh active
- 2005-06-27 CN CNB2005100810071A patent/CN100346310C/zh active Active
- 2005-06-30 CN CNB2005100814180A patent/CN100377136C/zh active Active
- 2005-07-01 TW TW094122419A patent/TWI285813B/zh active
- 2005-07-14 CN CNB2007101373555A patent/CN100549996C/zh active Active
- 2005-07-14 CN CNB200510084812XA patent/CN100367695C/zh active Active
- 2005-08-30 US US11/162,151 patent/US7613959B2/en active Active
- 2005-08-30 US US11/162,153 patent/US7490278B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20060117125A1 (en) | 2006-06-01 |
TW200615770A (en) | 2006-05-16 |
TWI273427B (en) | 2007-02-11 |
US20060123298A1 (en) | 2006-06-08 |
CN1700183A (zh) | 2005-11-23 |
CN100346310C (zh) | 2007-10-31 |
US7613959B2 (en) | 2009-11-03 |
US7490278B2 (en) | 2009-02-10 |
CN1700633A (zh) | 2005-11-23 |
TWI273259B (en) | 2007-02-11 |
CN101105785A (zh) | 2008-01-16 |
TWI285813B (en) | 2007-08-21 |
CN1702642A (zh) | 2005-11-30 |
CN100549996C (zh) | 2009-10-14 |
CN100367695C (zh) | 2008-02-06 |
TW200615559A (en) | 2006-05-16 |
CN100377136C (zh) | 2008-03-26 |
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