TW200614883A - Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same and information handling system utilizing same - Google Patents

Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same and information handling system utilizing same

Info

Publication number
TW200614883A
TW200614883A TW094124018A TW94124018A TW200614883A TW 200614883 A TW200614883 A TW 200614883A TW 094124018 A TW094124018 A TW 094124018A TW 94124018 A TW94124018 A TW 94124018A TW 200614883 A TW200614883 A TW 200614883A
Authority
TW
Taiwan
Prior art keywords
same
memory device
handling system
substrate
information handling
Prior art date
Application number
TW094124018A
Other languages
English (en)
Inventor
Subahu D Desai
How T Lin
John M Lauffer
Voya R Markovich
David L Thomas
Original Assignee
Endicott Interconnect Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Endicott Interconnect Tech Inc filed Critical Endicott Interconnect Tech Inc
Publication of TW200614883A publication Critical patent/TW200614883A/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0166Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0179Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09763Printed component having superposed conductors, but integrated in one circuit layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10159Memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Semiconductor Memories (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
TW094124018A 2004-07-28 2005-07-15 Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same and information handling system utilizing same TW200614883A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/900,385 US7253502B2 (en) 2004-07-28 2004-07-28 Circuitized substrate with internal organic memory device, electrical assembly utilizing same, and information handling system utilizing same

Publications (1)

Publication Number Publication Date
TW200614883A true TW200614883A (en) 2006-05-01

Family

ID=35219305

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094124018A TW200614883A (en) 2004-07-28 2005-07-15 Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same and information handling system utilizing same

Country Status (5)

Country Link
US (2) US7253502B2 (zh)
EP (2) EP1976349A3 (zh)
JP (1) JP2006049884A (zh)
CN (1) CN1728918B (zh)
TW (1) TW200614883A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI626869B (zh) * 2016-11-29 2018-06-11 欣興電子股份有限公司 電路板及其製造方法

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6946726B1 (en) * 2003-11-26 2005-09-20 Actel Corporation Chip carrier substrate with a land grid array and external bond terminals
US7235745B2 (en) * 2005-01-10 2007-06-26 Endicott Interconnect Technologies, Inc. Resistor material with metal component for use in circuitized substrates, circuitized substrate utilizing same, method of making said ciruitized substrate, and information handling system utilizing said ciruitized substrate
US7473096B2 (en) * 2006-06-21 2009-01-06 3M Innovative Properties Company Orthodontic adhesive dispensing assembly
US7800916B2 (en) 2007-04-09 2010-09-21 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal stacked semiconductor chips, method of making same, electrical assembly utilizing same and information handling system utilizing same
DE102009034082A1 (de) 2009-07-21 2011-01-27 Osram Gesellschaft mit beschränkter Haftung Optoelektronische Baueinheit und Verfahren zur Herstellung einer solchen Baueinheit
US8927909B2 (en) * 2010-10-11 2015-01-06 Stmicroelectronics, Inc. Closed loop temperature controlled circuit to improve device stability
US8558374B2 (en) 2011-02-08 2013-10-15 Endicott Interconnect Technologies, Inc. Electronic package with thermal interposer and method of making same
US20130134553A1 (en) * 2011-11-30 2013-05-30 Taiwan Semiconductor Manufacturing Co., Ltd. Interposer and semiconductor package with noise suppression features
CN102496612B (zh) * 2011-12-21 2013-09-18 重庆西南集成电路设计有限责任公司 一种采用陶瓷外壳封装的具有高隔离度的集成电路
FR2985367A1 (fr) * 2011-12-29 2013-07-05 3D Plus Procede de fabrication collective de modules electroniques 3d ne comportant que des pcbs valides
US8715006B2 (en) * 2012-06-11 2014-05-06 Tyco Electronics Corporation Circuit board having plated thru-holes and ground columns
US8890302B2 (en) 2012-06-29 2014-11-18 Intel Corporation Hybrid package transmission line circuits
TWI557852B (zh) * 2014-03-12 2016-11-11 廣達電腦股份有限公司 系統級封裝模組及其製造方法
WO2016081868A1 (en) 2014-11-21 2016-05-26 Amphenol Corporation Mating backplane for high speed, high density electrical connector
KR20170009652A (ko) * 2015-07-17 2017-01-25 삼성전자주식회사 배선 기판 및 이를 포함하는 메모리 시스템
US10187972B2 (en) 2016-03-08 2019-01-22 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
US10201074B2 (en) 2016-03-08 2019-02-05 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
JP2019057532A (ja) * 2017-09-19 2019-04-11 東芝メモリ株式会社 半導体メモリ
US11057995B2 (en) 2018-06-11 2021-07-06 Amphenol Corporation Backplane footprint for high speed, high density electrical connectors
CN114128053B (zh) 2019-05-20 2024-10-11 安费诺有限公司 高密度高速电连接器
WO2021154823A1 (en) 2020-01-27 2021-08-05 Amphenol Corporation Electrical connector with high speed mounting interface
TW202147717A (zh) 2020-01-27 2021-12-16 美商安芬諾股份有限公司 具有高速安裝界面之電連接器

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5016085A (en) 1988-03-04 1991-05-14 Hughes Aircraft Company Hermetic package for integrated circuit chips
US5272359A (en) * 1988-04-07 1993-12-21 California Institute Of Technology Reversible non-volatile switch based on a TCNQ charge transfer complex
JP2788265B2 (ja) * 1988-07-08 1998-08-20 オリンパス光学工業株式会社 強誘電体メモリ及びその駆動方法,製造方法
US4956694A (en) * 1988-11-04 1990-09-11 Dense-Pac Microsystems, Inc. Integrated circuit chip stacking
US5227338A (en) * 1990-04-30 1993-07-13 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5099309A (en) * 1990-04-30 1992-03-24 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5426263A (en) * 1993-12-23 1995-06-20 Motorola, Inc. Electronic assembly having a double-sided leadless component
JP2701802B2 (ja) * 1995-07-17 1998-01-21 日本電気株式会社 ベアチップ実装用プリント基板
US6084306A (en) * 1998-05-29 2000-07-04 Texas Instruments Incorporated Bridging method of interconnects for integrated circuit packages
US6016085A (en) * 1998-09-28 2000-01-18 Emc Technology Llc Flat cable load
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
US6242282B1 (en) * 1999-10-04 2001-06-05 General Electric Company Circuit chip package and fabrication method
US6480395B1 (en) * 2000-05-25 2002-11-12 Hewlett-Packard Company Device and method for interstitial components in a printed circuit board
JP2002026277A (ja) 2000-06-30 2002-01-25 Seiko Epson Corp メモリデバイス及びその駆動方法
JP3901432B2 (ja) * 2000-08-22 2007-04-04 セイコーエプソン株式会社 強誘電体キャパシタを有するメモリセルアレイおよびその製造方法
US6388204B1 (en) * 2000-08-29 2002-05-14 International Business Machines Corporation Composite laminate circuit structure and methods of interconnecting the same
NO20005980L (no) * 2000-11-27 2002-05-28 Thin Film Electronics Ab Ferroelektrisk minnekrets og fremgangsmåte ved dens fremstilling
US6593534B2 (en) 2001-03-19 2003-07-15 International Business Machines Corporation Printed wiring board structure with z-axis interconnections
US6754854B2 (en) * 2001-06-04 2004-06-22 Motorola, Inc. System and method for event monitoring and error detection
US6960479B2 (en) * 2001-07-20 2005-11-01 Intel Corporation Stacked ferroelectric memory device and method of making same
US6624457B2 (en) * 2001-07-20 2003-09-23 Intel Corporation Stepped structure for a multi-rank, stacked polymer memory device and method of making same
US6828685B2 (en) * 2002-06-14 2004-12-07 Hewlett-Packard Development Company, L.P. Memory device having a semiconducting polymer film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI626869B (zh) * 2016-11-29 2018-06-11 欣興電子股份有限公司 電路板及其製造方法

Also Published As

Publication number Publication date
EP1622433A1 (en) 2006-02-01
US20070249089A1 (en) 2007-10-25
CN1728918B (zh) 2010-05-05
EP1976349A2 (en) 2008-10-01
US7326643B2 (en) 2008-02-05
JP2006049884A (ja) 2006-02-16
US7253502B2 (en) 2007-08-07
EP1976349A3 (en) 2010-02-03
CN1728918A (zh) 2006-02-01
US20060022303A1 (en) 2006-02-02

Similar Documents

Publication Publication Date Title
TW200614883A (en) Circuitized substrate with internal organic memory device, method of making same, electrical assembly utilizing same and information handling system utilizing same
MXPA06000842A (es) Tarjeta de circuito impreso con componentes empotrados y metodo de fabricacion.
WO2006045199A8 (en) Organic light-emitting devices with multiple hole injection layers containing fullerene
WO2005013339A3 (en) Methods of forming conductive structures including titanium-tungsten base layers and related structures
WO2002019430A3 (en) Hybrid substrate with embedded capacitors and methods of manufacture
TW200627562A (en) Chip electrical connection structure and fabrication method thereof
WO2010048653A3 (de) Verfahren zur integration eines elektronischen bauteils in eine leiterplatte
TW200629998A (en) Printed circuit board and forming method thereof
TW200731898A (en) Circuit board structure and method for fabricating the same
WO2006020345A3 (en) Electrical contact encapsulation
SG135106A1 (en) Method and process for embedding electrically conductive elements in a dielectric layer
EP1976060A4 (en) ANTENNA CELL MODULE, CARD TYPE INFORMATION DEVICE AND METHOD OF MANUFACTURING THEREOF
EP1069811A3 (en) Multi-layer wiring board and method for manufacturing the same
TW200718299A (en) Wiring board, wiring material, copper-clad laminate, and wiring board fabrication method
TW200628025A (en) Capacitive/resistive devices, high dielectric constant organic dielectric laminates and printed wiring boards incorporating such devices, and methods of making thereof
TWI267173B (en) Circuit device and method for manufacturing thereof
WO2002100140A3 (de) Leiterplatte mit mindestens einem elektronischen bauteil
AU2003224689A1 (en) Conductive polymer device and method of manufacturing same
WO2007043972A8 (en) Device carrying an integrated circuit/components and method of producing the same
TW200420203A (en) Multilayer board and its manufacturing method
TW200715525A (en) Semiconductor integrated circuit device and method for manufacturing same
MX2007003615A (es) Circuito integrado y metodo de fabricacion.
TW200608564A (en) Method of manufacturing active matrix substrate, active matrix substrate, electro-optical device, and electronic apparatus
EP1278404A4 (en) PCB AND METHOD FOR THE PRODUCTION THEREOF
TW200741895A (en) Package using array capacitor core