TWI557852B - 系統級封裝模組及其製造方法 - Google Patents

系統級封裝模組及其製造方法 Download PDF

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TWI557852B
TWI557852B TW103108594A TW103108594A TWI557852B TW I557852 B TWI557852 B TW I557852B TW 103108594 A TW103108594 A TW 103108594A TW 103108594 A TW103108594 A TW 103108594A TW I557852 B TWI557852 B TW I557852B
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package
substrate
wafer
circuit board
printed circuit
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TW103108594A
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TW201535623A (zh
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沈里正
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廣達電腦股份有限公司
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Priority to TW103108594A priority Critical patent/TWI557852B/zh
Priority to CN201410128362.9A priority patent/CN104916600A/zh
Priority to US14/314,150 priority patent/US9601407B2/en
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Description

系統級封裝模組及其製造方法
本發明係有關一種封裝技術，且特別有關一種系統級封裝(system-in-package,SIP)模組及其製造方法。
系統級封裝(system-in-package,SIP)技術係指將複數個積體電路晶片及/或被動元件整合至一個封裝體中，其可包括多晶片模組(multi-chip module,MCM)、多晶片封裝(multi-chip package,MCP)、晶片堆疊或將主動/被動元件內埋於基板(embedded substrate)等不同封裝型態。由於具備異質整合特性，系統級封裝模組被廣泛應用在各種微型化需求上。再者，由於每個功能晶片都可以單獨開發，因此系統級封裝技術具有比系統級晶片(system-on-chip,SOC)更快的開發速度和更低的開發成本。因此，系統級封裝技術常用於需要整合不同種類的積體電路晶片及/或被動元件的產品中，如數位相機、MP3播放器、手機等。
然而，隨著積體電路晶片不同世代的演進，晶片內電子部件(如，電晶體、二極體等)集積度逐漸增加且晶片尺 寸逐漸微縮，系統級封裝模組內累積的熱量亦因此隨之提升。請參照第1圖及第2圖，第1圖繪示出習知技術中具有一無線傳輸晶片的一系統級封裝模組之溫度隨時間變化圖，第2圖繪示出第1圖之系統級封裝模組內的無線傳輸晶片之訊號傳輸量隨時間變化圖。如第1圖及第2圖所示，當系統級封裝模組的溫度到達一臨界值時，無線傳輸晶片的訊號傳輸量將大幅下降。換句話說，當系統級封裝模組累積過多的熱量時，其所封裝的晶片將可能失去原有功效，進而使產品的可靠度下降。
因此，業界亟需新穎的系統級封裝模組及其製造方法，以期能改善系統級封裝模組的散熱效率。
本發明之實施例係揭示一種系統級封裝模組，包括：一基板；一圍堰(dam)，位於基板上且定義出一凹穴(cavity)；至少一晶片，位於凹穴內的基板上；一印刷電路板，接合至圍堰以覆蓋凹穴；以及一導熱片，位於凹穴內且設置於晶片及印刷電路板之間，其中晶片藉由導熱片與印刷電路板形成熱接觸。
本發明之另一實施例係揭示一種系統級封裝模組的製造方法，包括：提供一基板，基板具有複數個封裝區域；於封裝區域的每一者上設置一圍堰與至少一晶片，其中晶片位於由圍堰所定義的一凹穴內；於封裝區域的每一者的凹穴內設置一導熱片，使導熱片與晶片形成熱接觸；沿著封裝區域的邊界切割基板，以形成複數個封裝體；以及將封裝體的每一者接合至一印刷電路板，其中晶片藉由導熱片與印刷電路板形成熱接觸。
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳細說明如下：
10‧‧‧封裝體
100、100’‧‧‧基板
100A、100B‧‧‧封裝區域
101‧‧‧圍堰
102‧‧‧凹穴
103、104‧‧‧晶片
105‧‧‧被動元件
109‧‧‧黏著層
110‧‧‧導熱板
110’‧‧‧導熱片
120、120’‧‧‧焊料凸塊
200‧‧‧印刷電路板
300‧‧‧接合頭
第1圖為習知技術中具有一無線傳輸晶片的一系統級封裝模組之溫度隨時間變化圖。
第2圖為第1圖之系統級封裝模組內的無線傳輸晶片之訊號傳輸量隨時間變化圖。
第3A至3F圖為根據本發明一實施例之系統級封裝模組的製造方法的剖面示意圖。
以下說明本發明實施例之系統級封裝模組及其製造方法。然而，可輕易瞭解本發明所提供的實施例僅用於說明以特定方法製作及使用本發明，並非用以侷限本發明的範圍。再者，在本發明實施例之圖式及說明內容中係使用相同的標號來表示相同或相似的部件。
第3F圖為根據本發明一實施例之系統級封裝(system-in-package,SIP)模組的剖面示意圖。請參照第3F圖，在本實施例中，系統級封裝模組包括一基板100’，以及位於基板100’上的一圍堰101與複數個晶片103及104，其中圍堰101定義出一凹穴(cavity)102，而晶片103及104位於凹穴102內。
在本實施例中，基板100’與圍堰101內可分別具有一內連(interconnect)結構(未繪示)，其可包括金屬線、金屬介層窗(via)及接墊等部件。晶片103及104可藉由上述內連結構進行電性連接。
複數個被動元件105可選擇性設置於凹穴102內的基板100’上。在本實施例中，被動元件105可藉由基板100’與圍堰101內的內連結構進行電性連接。
繼續參照第3F圖，系統級封裝模組包括接合至圍堰101並覆蓋凹穴102的一印刷電路板200，以及位於凹穴102內且設置於晶片103及104及印刷電路板200之間的一導熱片110’，其中晶片103及104藉由導熱片110’與印刷電路板200形成熱接觸。
在本實施例中，印刷電路板200可藉由複數個焊料凸塊120接合至圍堰101，並進一步藉由基板100’與圍堰101內的內連結構電性連接至晶片103及104。
在一實施例中，至少一導熱部件可形成於導熱片110’與印刷電路板200之間。舉例來說，可於導熱片110’與印刷電路板200之間設置額外的焊料凸塊120’來作為導熱部件，但本發明不以此為限。在其他實施例中，亦可於使用其他種類的導熱部件，例如散熱膏、銀膏、導熱膠材。
在另一實施例中，導熱片110’可直接接觸印刷電路板200。亦即，導熱片110’與印刷電路板200之間可不存在任何導熱部件。
在上述實施例中，藉由在晶片103及104與印刷電 路板200之間設置導熱板110’，並使導熱板110’分別與晶片103及104及印刷電路板200形成熱接觸，可進一步縮短晶片103及104與印刷電路板200之間的散熱路徑，進而可有效率地將晶片103及104所發出的熱量藉由導熱板110’向外散出至印刷電路板200。藉此，可改善習知系統級封裝模組因散熱不佳所產生的熱點問題(hot spot issue)，進而有助於延長系統級封裝模組的使用週期以及改善系統級封裝模組的可靠度。
第3A至3F圖為根據本發明一實施例之系統級封裝模組的製造方法的剖面示意圖。請參照第3A圖，提供一基板100，其具有複數個封裝區域100A及100B。接著，於每一封裝區域100A及100B上設置一圍堰101以及複數個晶片103及104，其中晶片103及104位於由圍堰101所定義的一凹穴102內。
為求簡化圖式，第3A圖及後續圖式中僅繪示出2個封裝區域100A及100B。然而，可輕易理解本發明之基板100可提供更多個封裝區域。再者，雖然第3A圖及後續圖式中係繪示出每一封裝區域100A及100B的凹穴102內具有2個晶片103及104，但本發明不以此為限。可輕易理解每一凹穴102內可設有一個或更多個晶片。
在本實施例中，基板100可為一封裝基板，其可包括紙質酚醛樹脂(paper phenolic resin)、複合環氧樹脂(composite epoxy resin)、聚亞醯胺樹脂(polyimide resin)、玻璃纖維(glass fiber)或任何習知的封裝基板材料。在一實施例中，圍堰101與基板100可由相同的材質所構成。
在本實施例中，晶片103及104可分別為不同類型 的晶片，其包括但不限於邏輯晶片、記憶體、處理器、基頻晶片或射頻晶片。舉例來說，晶片103可為基頻晶片，而晶片104可為射頻晶片，但本發明不以此為限。可理解的是本發明之系統級封裝模組可應用於各種不同類型晶片的封裝。
在本實施例中，基板100與圍堰101內可分別具有一內連結構(未繪示)，其可包括金屬線、金屬介層窗(via)以及接墊等部件，並可透過全加成法(fully additive process)、半加成法(semi additive process)、減除法(subtractive process)或任何適當的方法製造。晶片103及104可藉由內連結構進行內部或外部的電性連接。
在本實施例中，可選擇性地於每一封裝區域100A及100B的凹穴102內的基板100上形成複數個被動元件105，其例如為濾波器、電容、電阻、電感等元件。在本實施例中，被動元件105可藉由基板100與圍堰101內的內連結構進行電性連接。
請參照第3B圖，提供一導熱板110。導熱板110的材質可例如為：金屬、合金、石墨片、複合材。接著，請參照第3C圖，將導熱板110切割成對應封裝區域100A及100B的複數個導熱片110’。
導熱片110’的尺寸需小於凹穴102的尺寸，以利於在後續製程(如，第3D圖所述之製程)中將導熱片110’置入凹穴102。在一實施例中，導熱片110’的尺寸可大於晶片103及104的加總尺寸，以使導熱片110’在置入凹穴102後可完全覆蓋凹穴102內的晶片103及104(如第3D圖所示)。
請參照第3D圖，於每一封裝區域100A及100B的凹穴102內設置一導熱片110’，使導熱片110’與晶片103及104形成熱接觸。在第3D圖所繪示之實施例中，導熱片110’的設置步驟可包括於每一封裝區域100A及100B的晶片103及104上分別形成一黏著層109。接著，藉由一接合頭(bonding head)300吸住一導熱片110’，並將每一導熱片110’依序傳送至每一封裝區域100A及100B的凹穴102內，進而使導熱片110’藉由黏著層109接合至晶片103及104上。在上述實施例中，導熱片110’係藉由接合頭300依序傳送，其可精準地將導熱片110’設置於凹穴102內。
在另一實施例中，在完成上述之分割導熱片110’及形成黏著層109的步驟之後，可藉由一接合頭(如，接合頭300)吸住基板100的背側(即，未形成凹穴102的一側)(未繪示)，以將基板100傳送至導熱片110’上並使基板100上的每一凹穴102對準一導熱片110’，進而使導熱片110’藉由黏著層109接合至晶片103及104上。上述實施例係以批次(batch)的方式將每一導熱片110’置入每一封裝區域100A及100B的凹穴102內，其有助於縮短製程週期並提高製程產率。
在一實施例中，導熱片110’的一表面可齊平於圍堰101的一表面，藉此可使導熱片110’較容易與後續形成的導熱部件(如，第3F圖之焊料凸塊120’)形成良好接觸。
請參照第3E圖，沿著封裝區域100A及100B的邊界(如第3D圖的虛線)將基板100切割成複數個基板100’，進而形成複數個封裝體10。基板100可藉由任何適當的方式來分割成 複數個基板100’，舉例來說，可藉由切割刀切割基板100、藉由化學藥劑蝕刻基板100或是藉由雷射切割基板100。以上方法為本領域具有通常知識者所習知，在此不加以贅述。
請參照第3F圖，將每一分割出的封裝體10接合至一印刷電路板200，其中晶片103及104藉由導熱片110’與印刷電路板200形成熱接觸。
在本實施例中，可於圍堰101與印刷電路板200之間形成複數個焊料凸塊120，藉此將印刷電路板200接合至圍堰101。印刷電路板200可進一步藉由基板100’與圍堰101內的內連結構電性連接至晶片103及104。
在一實施例中，可於導熱片110’與印刷電路板200之間形成至少一導熱部件。舉例來說，可於導熱片110’與印刷電路板200之間設置額外的焊料凸塊120’以作為導熱部件。在本實施例中，焊料凸塊120’與焊料凸塊120可在同一製程(例如，網版印刷製程)中形成，且可具有大抵上相同的高度。在其他實施例中，亦可於導熱片110’與印刷電路板200之間形成其他種類的導熱部件，例如散熱膏、銀膏、導熱膠材。
在另一實施例中，導熱片110’可直接接觸印刷電路板200。亦即，導熱片110’與印刷電路板200之間可不存在任何導熱部件。
綜上所述，在上述實施例中，藉由在晶片103及104與印刷電路板200之間設置導熱板110’，並使導熱板110’分別與晶片103及104及印刷電路板200形成熱接觸，可進一步縮短晶片103及104與印刷電路板200之間的散熱路徑，進而可有效率 地將晶片103及104所發出的熱量藉由導熱板110’向外散出至印刷電路板200。藉此，可改善習知系統級封裝模組因散熱不佳所產生的熱點問題，進而有助於延長系統級封裝模組的使用週期以及改善系統級封裝模組的可靠度。
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明。任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾。因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10‧‧‧封裝體
100’‧‧‧基板
101‧‧‧圍堰
102‧‧‧凹穴
103、104‧‧‧晶片
105‧‧‧被動元件
109‧‧‧黏著層
110’‧‧‧導熱片
120、120’‧‧‧焊料凸塊
200‧‧‧印刷電路板

Claims (13)

  1. 一種系統級封裝模組，包括：一基板；一圍堰，位於該基板上且定義出一凹穴；至少一晶片，位於該凹穴內的該基板上；一印刷電路板，接合至該圍堰以覆蓋該凹穴；以及一導熱片，位於該凹穴內且設置於該晶片及該印刷電路板之間，其中該晶片藉由該導熱片與該印刷電路板形成熱接觸。
  2. 如申請專利範圍第1項所述之系統級封裝模組，其中該導熱片的一表面齊平於該圍堰的一表面。
  3. 如申請專利範圍第1項所述之系統級封裝模組，更包括至少一導熱部件，設置於該導熱片及該印刷電路板之間，其中該導熱部件包括焊料凸塊或散熱膏。
  4. 如申請專利範圍第1項所述之系統級封裝模組，其中該基板與該圍堰更包括一內連結構，該晶片藉由該基板及該內連結構與該印刷電路板形成電性連接。
  5. 如申請專利範圍第1項所述之系統級封裝模組，更包括一黏著層，設置於該晶片與該導熱片之間。
  6. 如申請專利範圍第1項所述之系統級封裝模組，更包括複數個被動元件，設置於該凹穴內的該基板上。
  7. 一種系統級封裝模組的製造方法，包括：提供一基板，該基板具有複數個封裝區域；於該些封裝區域的每一者上設置一圍堰與至少一晶片，其中該晶片位於由該圍堰所定義的一凹穴內； 於該些封裝區域的每一者的該凹穴內設置一導熱片，使該導熱片與該晶片形成熱接觸；沿著該些封裝區域的邊界切割該基板，以形成複數個封裝體；以及將該些封裝體的每一者接合至一印刷電路板，其中該晶片藉由該導熱片與該印刷電路板形成熱接觸。
  8. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，其中於該些封裝區域的每一者的該凹穴內設置該導熱片的步驟包括：提供一導熱板；將該導熱板切割成複數個導熱片；於該些封裝區域的每一者的該晶片上分別形成一黏著層；以及依序傳送該些導熱片的每一者至該些封裝區域的每一者的該凹穴，使該些導熱片的每一者藉由該黏著層接合至該些封裝區域的每一者的該晶片上。
  9. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，其中於該些封裝區域的每一者的該凹穴內設置該導熱片的步驟包括：提供一導熱板；將該導熱板切割成複數個導熱片；於該些封裝區域的每一者的該晶片上分別形成一黏著層；以及 傳送該基板至該些導熱片上，使該些導熱片的每一者藉由該黏著層接合至該些封裝區域的每一者的該晶片上。
  10. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，其中該導熱片的一表面齊平於該圍堰的一表面。
  11. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，更包括於該導熱片及該印刷電路板之間形成至少一導熱部件，其中該導熱部件包括焊料凸塊或散熱膏。
  12. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，更包括於該基板與該圍堰內形成一內連結構，其中該晶片藉由該基板及該內連結構與該印刷電路板形成電性連接。
  13. 如申請專利範圍第7項所述之系統級封裝模組的製造方法，更包括於該些封裝區域的每一者的該凹穴內的該基板上形成複數個被動元件。
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