TW200603160A - Method and device for controlling internal power voltage, and semiconductor memory device having the same - Google Patents
Method and device for controlling internal power voltage, and semiconductor memory device having the sameInfo
- Publication number
- TW200603160A TW200603160A TW094119466A TW94119466A TW200603160A TW 200603160 A TW200603160 A TW 200603160A TW 094119466 A TW094119466 A TW 094119466A TW 94119466 A TW94119466 A TW 94119466A TW 200603160 A TW200603160 A TW 200603160A
- Authority
- TW
- Taiwan
- Prior art keywords
- power
- power voltage
- internal
- flag signal
- internal power
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020040043838A KR100750590B1 (ko) | 2004-06-15 | 2004-06-15 | 파워-업시 내부 전원 전압 제어 방법 및 장치, 이를가지는 반도체 메모리 장치 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200603160A true TW200603160A (en) | 2006-01-16 |
Family
ID=35460270
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094119466A TW200603160A (en) | 2004-06-15 | 2005-06-13 | Method and device for controlling internal power voltage, and semiconductor memory device having the same |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7436730B2 (zh) |
| KR (1) | KR100750590B1 (zh) |
| TW (1) | TW200603160A (zh) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100849957B1 (ko) * | 2007-03-08 | 2008-08-01 | 삼성전자주식회사 | 반도체 메모리 장치 및 그것의 입출력 구동회로 및 그것에대한 전류 공급 방법 |
| KR101535267B1 (ko) | 2008-12-01 | 2015-07-09 | 삼성전자주식회사 | 파워-온 검출기, 파워-온 검출기의 동작 방법, 그리고 파워-온 검출기를 포함하는 메모리 장치 |
| KR101015712B1 (ko) * | 2009-05-29 | 2011-02-22 | 주식회사 하이닉스반도체 | 반도체 장치 및 이를 이용한 구동 방법 |
| KR101046242B1 (ko) * | 2009-06-30 | 2011-07-04 | 주식회사 하이닉스반도체 | 임피던스 조정 회로 및 이를 이용한 반도체 장치 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0154749B1 (ko) * | 1995-07-06 | 1998-12-01 | 김광호 | 외부 전원 전압감지기를 가지는 내부 승압 전원 회로를 구비하는 반도체 메모리장치 |
| JP3938410B2 (ja) | 1996-04-16 | 2007-06-27 | 三菱電機株式会社 | 半導体集積回路 |
| US5781490A (en) | 1996-07-03 | 1998-07-14 | Micron Technology, Inc. | Multiple staged power up of integrated circuit |
| JP4219516B2 (ja) * | 1999-12-20 | 2009-02-04 | 富士通株式会社 | 電源制御装置及び電源制御方法及び記憶媒体 |
| KR100394757B1 (ko) * | 2000-09-21 | 2003-08-14 | 가부시끼가이샤 도시바 | 반도체 장치 |
| US6791892B2 (en) | 2001-07-18 | 2004-09-14 | Samsung Electronics Co., Ltd. | Method of generating an initializing signal during power-up of semiconductor memory device |
| JP2003242784A (ja) * | 2002-02-15 | 2003-08-29 | Kawasaki Microelectronics Kk | 連想メモリ装置 |
| TWI471714B (zh) * | 2003-05-07 | 2015-02-01 | 考文森智財管理公司 | 具有功率管理之系統及用於管理功率之方法 |
-
2004
- 2004-06-15 KR KR1020040043838A patent/KR100750590B1/ko active IP Right Grant
-
2005
- 2005-06-13 TW TW094119466A patent/TW200603160A/zh unknown
- 2005-06-15 US US11/154,076 patent/US7436730B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US20050275986A1 (en) | 2005-12-15 |
| KR20050118751A (ko) | 2005-12-20 |
| US7436730B2 (en) | 2008-10-14 |
| KR100750590B1 (ko) | 2007-08-20 |
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