TW200601918A - Semiconductor device and manufacturing method for the same - Google Patents
Semiconductor device and manufacturing method for the sameInfo
- Publication number
- TW200601918A TW200601918A TW094106818A TW94106818A TW200601918A TW 200601918 A TW200601918 A TW 200601918A TW 094106818 A TW094106818 A TW 094106818A TW 94106818 A TW94106818 A TW 94106818A TW 200601918 A TW200601918 A TW 200601918A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- oxide film
- wiring pattern
- manufacturing
- same
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B19/00—Layered products comprising a layer of natural mineral fibres or particles, e.g. asbestos, mica
- B32B19/04—Layered products comprising a layer of natural mineral fibres or particles, e.g. asbestos, mica next to another layer of the same or of a different material
- B32B19/045—Layered products comprising a layer of natural mineral fibres or particles, e.g. asbestos, mica next to another layer of the same or of a different material of synthetic resin
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
- B32B37/12—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004063997A JP4094574B2 (ja) | 2004-03-08 | 2004-03-08 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200601918A true TW200601918A (en) | 2006-01-01 |
TWI274531B TWI274531B (en) | 2007-02-21 |
Family
ID=34909335
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094106818A TWI274531B (en) | 2004-03-08 | 2005-03-07 | Semiconductor device and manufacturing method for the same |
Country Status (5)
Country | Link |
---|---|
US (1) | US20050194686A1 (zh) |
JP (1) | JP4094574B2 (zh) |
KR (1) | KR100686677B1 (zh) |
CN (1) | CN100372110C (zh) |
TW (1) | TWI274531B (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006033870B4 (de) * | 2006-07-21 | 2009-02-26 | Infineon Technologies Ag | Elektronisches Bauteil mit mehreren Substraten sowie ein Verfahren zur Herstellung desselben |
JP4219951B2 (ja) * | 2006-10-25 | 2009-02-04 | 新光電気工業株式会社 | はんだボール搭載方法及びはんだボール搭載基板の製造方法 |
JP5396750B2 (ja) * | 2008-06-16 | 2014-01-22 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP2010040599A (ja) * | 2008-07-31 | 2010-02-18 | Sanyo Electric Co Ltd | 半導体モジュールおよび半導体装置 |
JP4737466B2 (ja) * | 2009-02-09 | 2011-08-03 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
US8712571B2 (en) * | 2009-08-07 | 2014-04-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for wireless transmission of diagnostic information |
JP2012160500A (ja) * | 2011-01-31 | 2012-08-23 | Sony Corp | 回路基板、半導体部品、半導体装置、回路基板の製造方法、半導体部品の製造方法及び半導体装置の製造方法 |
JP6571446B2 (ja) * | 2015-08-11 | 2019-09-04 | ローム株式会社 | 半導体装置 |
KR102635846B1 (ko) * | 2020-04-03 | 2024-02-13 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
US11948891B2 (en) | 2020-04-03 | 2024-04-02 | Nepes Co., Ltd. | Semiconductor package and manufacturing method thereof |
KR102621743B1 (ko) * | 2020-04-03 | 2024-01-05 | 주식회사 네패스 | 반도체 패키지 및 그 제조방법 |
CN112702848B (zh) * | 2021-03-24 | 2021-05-28 | 成都市克莱微波科技有限公司 | 一种高频柔性微波印制电路板的清洗方法 |
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US5472913A (en) * | 1994-08-05 | 1995-12-05 | Texas Instruments Incorporated | Method of fabricating porous dielectric material with a passivation layer for electronics applications |
DE19643609B4 (de) * | 1996-10-14 | 2007-07-19 | Pirelli Cavi E Sistemi S.P.A. | Fertigungseinrichtung zum Aufbringen einer Oxidschicht auf die einzelnen Drähte eines vieldrähtigen Kupferleiters |
KR100269540B1 (ko) * | 1998-08-28 | 2000-10-16 | 윤종용 | 웨이퍼 상태에서의 칩 스케일 패키지 제조 방법 |
US6903451B1 (en) * | 1998-08-28 | 2005-06-07 | Samsung Electronics Co., Ltd. | Chip scale packages manufactured at wafer level |
JP3137087B2 (ja) * | 1998-08-31 | 2001-02-19 | 日本電気株式会社 | 半導体装置の製造方法 |
US6504241B1 (en) * | 1998-10-15 | 2003-01-07 | Sony Corporation | Stackable semiconductor device and method for manufacturing the same |
KR100313706B1 (ko) * | 1999-09-29 | 2001-11-26 | 윤종용 | 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법 |
KR100306842B1 (ko) * | 1999-09-30 | 2001-11-02 | 윤종용 | 범프 패드에 오목 패턴이 형성된 재배치 웨이퍼 레벨 칩 사이즈 패키지 및 그 제조방법 |
KR100550505B1 (ko) * | 2001-03-01 | 2006-02-13 | 가부시끼가이샤 도시바 | 반도체 장치 및 반도체 장치의 제조 방법 |
US6541303B2 (en) * | 2001-06-20 | 2003-04-01 | Micron Technology, Inc. | Method for conducting heat in a flip-chip assembly |
JP3829325B2 (ja) * | 2002-02-07 | 2006-10-04 | 日本電気株式会社 | 半導体素子およびその製造方法並びに半導体装置の製造方法 |
-
2004
- 2004-03-08 JP JP2004063997A patent/JP4094574B2/ja not_active Expired - Lifetime
-
2005
- 2005-03-07 US US11/072,238 patent/US20050194686A1/en not_active Abandoned
- 2005-03-07 KR KR1020050018513A patent/KR100686677B1/ko not_active IP Right Cessation
- 2005-03-07 TW TW094106818A patent/TWI274531B/zh not_active IP Right Cessation
- 2005-03-08 CN CNB2005100545023A patent/CN100372110C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100686677B1 (ko) | 2007-02-27 |
CN100372110C (zh) | 2008-02-27 |
CN1677657A (zh) | 2005-10-05 |
US20050194686A1 (en) | 2005-09-08 |
TWI274531B (en) | 2007-02-21 |
JP4094574B2 (ja) | 2008-06-04 |
KR20060043439A (ko) | 2006-05-15 |
JP2005252162A (ja) | 2005-09-15 |
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