TW200511410A - Method for manufacturing device isolation film of semiconductor device - Google Patents

Method for manufacturing device isolation film of semiconductor device

Info

Publication number
TW200511410A
TW200511410A TW092136714A TW92136714A TW200511410A TW 200511410 A TW200511410 A TW 200511410A TW 092136714 A TW092136714 A TW 092136714A TW 92136714 A TW92136714 A TW 92136714A TW 200511410 A TW200511410 A TW 200511410A
Authority
TW
Taiwan
Prior art keywords
film
nitride film
device isolation
isolation film
selectivity slurry
Prior art date
Application number
TW092136714A
Other languages
English (en)
Other versions
TWI243417B (en
Inventor
Jong-Goo Jung
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200511410A publication Critical patent/TW200511410A/zh
Application granted granted Critical
Publication of TWI243417B publication Critical patent/TWI243417B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
TW092136714A 2003-09-05 2003-12-24 Method for manufacturing device isolation film of semiconductor device TWI243417B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2003-0062054A KR100499642B1 (ko) 2003-09-05 2003-09-05 반도체 소자의 소자 분리막 제조 방법

Publications (2)

Publication Number Publication Date
TW200511410A true TW200511410A (en) 2005-03-16
TWI243417B TWI243417B (en) 2005-11-11

Family

ID=34225423

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092136714A TWI243417B (en) 2003-09-05 2003-12-24 Method for manufacturing device isolation film of semiconductor device

Country Status (4)

Country Link
US (1) US7081396B2 (zh)
JP (1) JP2005086196A (zh)
KR (1) KR100499642B1 (zh)
TW (1) TWI243417B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4998665B2 (ja) * 2005-10-25 2012-08-15 セイコーエプソン株式会社 半導体装置の製造方法
KR100700284B1 (ko) * 2005-12-28 2007-03-26 동부일렉트로닉스 주식회사 반도체소자의 트랜치 소자분리막 형성방법
US8012846B2 (en) * 2006-08-04 2011-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Isolation structures and methods of fabricating isolation structures
JPWO2008117593A1 (ja) * 2007-03-26 2010-07-15 Jsr株式会社 化学機械研磨用水系分散体および半導体装置の化学機械研磨方法
US9257323B2 (en) 2013-03-11 2016-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for forming the same
US9159604B2 (en) * 2013-03-11 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for forming the same

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1167893A (ja) * 1997-08-12 1999-03-09 Nec Corp 半導体装置及びその製造方法
KR100286127B1 (ko) * 1998-06-24 2001-04-16 윤종용 반도체 장치의 트렌치 격리 형성 방법
JP2000156360A (ja) * 1998-06-30 2000-06-06 Fujitsu Ltd 半導体装置の製造方法
JP3161425B2 (ja) * 1998-09-09 2001-04-25 日本電気株式会社 Ｓｔｉの形成方法
KR100322531B1 (ko) * 1999-01-11 2002-03-18 윤종용 파임방지막을 이용하는 반도체소자의 트랜치 소자분리방법 및이를 이용한 반도체소자
US6177333B1 (en) * 1999-01-14 2001-01-23 Micron Technology, Inc. Method for making a trench isolation for semiconductor devices
KR100366619B1 (ko) * 1999-05-12 2003-01-09 삼성전자 주식회사 트랜치 소자분리방법, 트랜치를 포함하는 반도체소자의제조방법 및 그에 따라 제조된 반도체소자
DE60019142T2 (de) * 1999-08-13 2006-02-09 Cabot Microelectronics Corp., Aurora Poliersystem mit stopmittel und verfahren zu seiner verwendung
JP2002043408A (ja) * 2000-07-28 2002-02-08 Nec Kansai Ltd 半導体装置の製造方法
US6607967B1 (en) * 2000-11-15 2003-08-19 Lsi Logic Corporation Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate
JP2002208628A (ja) * 2001-01-11 2002-07-26 Mitsubishi Electric Corp 半導体装置の製造方法
KR20020071063A (ko) * 2001-03-02 2002-09-12 삼성전자 주식회사 덴트 없는 트렌치 격리 구조 및 그 형성 방법
KR100399986B1 (ko) * 2001-03-20 2003-09-29 삼성전자주식회사 셸로우트렌치 소자분리방법
JP2002289683A (ja) * 2001-03-28 2002-10-04 Nec Corp トレンチ分離構造の形成方法および半導体装置
US20020197823A1 (en) * 2001-05-18 2002-12-26 Yoo Jae-Yoon Isolation method for semiconductor device
US6645867B2 (en) * 2001-05-24 2003-11-11 International Business Machines Corporation Structure and method to preserve STI during etching
KR100557600B1 (ko) * 2001-06-29 2006-03-10 주식회사 하이닉스반도체 나이트라이드 cmp용 슬러리
JP3577024B2 (ja) * 2001-10-09 2004-10-13 エルピーダメモリ株式会社 半導体装置及びその製造方法
US6555442B1 (en) * 2002-01-08 2003-04-29 Taiwan Semiconductor Manufacturing Company Method of forming shallow trench isolation with rounded corner and divot-free by using disposable spacer

Also Published As

Publication number Publication date
KR20050024847A (ko) 2005-03-11
US7081396B2 (en) 2006-07-25
KR100499642B1 (ko) 2005-07-05
US20050054176A1 (en) 2005-03-10
JP2005086196A (ja) 2005-03-31
TWI243417B (en) 2005-11-11

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees