TW200504888A - Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method - Google Patents

Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method

Info

Publication number
TW200504888A
TW200504888A TW093102168A TW93102168A TW200504888A TW 200504888 A TW200504888 A TW 200504888A TW 093102168 A TW093102168 A TW 093102168A TW 93102168 A TW93102168 A TW 93102168A TW 200504888 A TW200504888 A TW 200504888A
Authority
TW
Taiwan
Prior art keywords
layer
channel region
conductor
deposited
semiconductor device
Prior art date
Application number
TW093102168A
Other languages
English (en)
Inventor
Robert James Pascoe Lander
Dirk Maarten Knotter
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW200504888A publication Critical patent/TW200504888A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823842Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/976Temporary protective layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
TW093102168A 2003-02-03 2004-01-30 Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method TW200504888A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03100213 2003-02-03

Publications (1)

Publication Number Publication Date
TW200504888A true TW200504888A (en) 2005-02-01

Family

ID=32842798

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093102168A TW200504888A (en) 2003-02-03 2004-01-30 Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method

Country Status (6)

Country Link
US (1) US7157337B2 (zh)
EP (1) EP1593155A1 (zh)
JP (1) JP2006518547A (zh)
KR (1) KR20050098879A (zh)
TW (1) TW200504888A (zh)
WO (1) WO2004070834A1 (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6972224B2 (en) * 2003-03-27 2005-12-06 Freescale Semiconductor, Inc. Method for fabricating dual-metal gate device
JP4533155B2 (ja) * 2005-01-12 2010-09-01 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US8178401B2 (en) 2005-08-25 2012-05-15 Freescale Semiconductor, Inc. Method for fabricating dual-metal gate device
US20090302389A1 (en) * 2005-09-15 2009-12-10 Nxp B.V. Method of manufacturing semiconductor device with different metallic gates
CN101263593A (zh) * 2005-09-15 2008-09-10 Nxp股份有限公司 制造具有不同金属栅极的半导体器件的方法
JP2007194592A (ja) * 2005-12-20 2007-08-02 Tdk Corp 誘電体素子とその製造方法
US20070152276A1 (en) * 2005-12-30 2007-07-05 International Business Machines Corporation High performance CMOS circuits, and methods for fabricating the same
JP2009021550A (ja) * 2007-07-12 2009-01-29 Panasonic Corp 半導体装置の製造方法
JP2009135419A (ja) * 2007-10-31 2009-06-18 Panasonic Corp 半導体装置及びその製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2790110B2 (ja) * 1996-02-28 1998-08-27 日本電気株式会社 半導体装置の製造方法
JPH11509987A (ja) * 1996-03-06 1999-08-31 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Pic(パワー集積回路)装置の製造方法及びこの方法により製造したpic装置
US6693331B2 (en) * 1999-11-18 2004-02-17 Intel Corporation Method of fabricating dual threshold voltage n-channel and p-channel MOSFETS with a single extra masked implant operation
US6383879B1 (en) 1999-12-03 2002-05-07 Agere Systems Guardian Corp. Semiconductor device having a metal gate with a work function compatible with a semiconductor device
JP2001284466A (ja) * 2000-03-29 2001-10-12 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4056195B2 (ja) * 2000-03-30 2008-03-05 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2002198441A (ja) * 2000-11-16 2002-07-12 Hynix Semiconductor Inc 半導体素子のデュアル金属ゲート形成方法
JP2002198526A (ja) * 2000-12-27 2002-07-12 Fujitsu Ltd 半導体装置の製造方法
KR100399356B1 (ko) 2001-04-11 2003-09-26 삼성전자주식회사 듀얼 게이트를 가지는 씨모스형 반도체 장치 형성 방법
KR100426441B1 (ko) * 2001-11-01 2004-04-14 주식회사 하이닉스반도체 반도체 소자의 시모스(cmos) 및 그의 제조 방법

Also Published As

Publication number Publication date
EP1593155A1 (en) 2005-11-09
US7157337B2 (en) 2007-01-02
JP2006518547A (ja) 2006-08-10
WO2004070834A1 (en) 2004-08-19
US20060138475A1 (en) 2006-06-29
KR20050098879A (ko) 2005-10-12

Similar Documents

Publication Publication Date Title
WO2005050713A3 (en) High-voltage transistors on insulator substrates
US7829916B2 (en) Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistor
TW200419802A (en) Structure of multiple-gate transistor and method for manufacturing the same
EP1531496A3 (en) Semiconductor devices having transistors and method for manufacturing the same
EP1434282A3 (en) Protective layer for an organic thin-film transistor
GB2417134A (en) Method for forming a gate in a finfet device and thinning a fin in a channel region of the finfet device
TW200633217A (en) Semiconductor device and manufacturing method therefor
WO1999066540A3 (en) An integrated inorganic/organic complementary thin-film transistor circuit and a method for its production
TW200625468A (en) A method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
EP1032033A3 (en) Method of forming dual metal gate structures for CMOS devices
TW200601463A (en) Method and apparatus for a semiconductor device with a high-k gate dielectric
TW200721491A (en) Semiconductor structures integrating damascene-body finfet's and planar devices on a common substrate and methods for forming such semiconductor structures
WO2003041184A3 (en) Organic field effect transistors
TW200509387A (en) Method of fabricating an ultra-narrow channel semiconductor device
WO2005089440A3 (en) Multiple dielectric finfet structure and method
WO2003050849A3 (en) High power-low noise microwave gan heterojunction field effet transistor
SG125099A1 (en) Semiconductor device and method for manufacturing the same
WO2005104225A3 (en) Method for forming a semiconductor device having a notched control electrode and structure thereof
TW200616028A (en) Passive device and method for forming the same
US9397199B1 (en) Methods of forming multi-Vt III-V TFET devices
TW200504888A (en) Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method
DE60236436D1 (de) Einzelelektrontransistoren und verfahren zur herstellung
WO2006023026A3 (en) Method of forming a semiconductor device and structure thereof
EP1396881A4 (en) THIN-CONDUCTIVE FILM FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME
TW200509244A (en) A selective etch process for making a semiconductor device having a high-k gate dielectric