SU944095A1 - Device for discriminating single pulse - Google Patents

Description

C5Y DEVICE FOR ISOLATING A SINGLE

PULSE

Claims (2)

The invention relates to a pulse technique and can be used to match an asynchronous pulse signal with a clock frequency of an external pulse source. A device for isolating a single pulse, containing two triggers and three elements AND 1, is known. The known device has a low speed, equal to the period of the clock frequency pulses. The closest technical solution to the invention is a device for extracting a single pulse containing an asynchronous trigger, two synchronous D-triggers, each of which is built, for example, on the basis of three asynchronous triggers of the RS type and contains six AND-NOT elements, an AND element, an inverter and switch consisting of element 2I-OR. The known device allows to obtain a speed equal to half the period of the following clock frequency pulses. 2. The disadvantage of this device is its low functional reliability when allocating a single pulse equal in duration to the pause or interval of the pulse frequency of the clock frequency caused by the appearance of a spike-type pulse at the switch output following the useful information pulse. The purpose of the invention is to increase the functional reliability of the device when a single pulse is selected with a duration equal to the pause or interval of the pulse frequency of the clock frequency. This goal is achieved by the fact that in the device for extracting a single pulse containing an element AND whose first input is connected to the output of the first AND-NO element, the outputs of the first, second, third, fourth and fifth AND-NOT elements connect 3 Iciu.i with fiepBbiMH the inputs of the corresponding (1 shs-stogo, seventh, eighth, depot and tenth elements of AND-NOT, the outputs of the sixth, seventh, eighth, ninth and tenth elements of IS-NOT are connected to the first inputs of the first, second, third, and the fifth NAND element, the second inputs The fourth and ninth elements of the NAND are connected to the control bus, about the second inputs of the second and fourth elements of the NAND are connected to the bus of the clock pulses, the second input of the first element of the NAND is connected to the second input of the third element NAND, the output of the of that element AND-NOT connected to the second input of the seventh element AND-NOT output of the eighth element AND-NOT connected to the second input of the sixth; about element AND-NOT output of the tenth element AND-NOT connected to the third inputs of the eighth and ninth elements AND-NOT , the output of the fourth element is NOT connected to the second input of the third element NAND, the output of the second element NAND is connected to the second input of the element AND, the output of which is connected to the second input of the fifth element NAND, the second input of the eighth element AND NAND is connected to the second input of the tenth element AND. NOT, and the output element And is connected to the output bus. FIG. 1 shows a functional diagram of a device for separating a single pulse; in fig. 2 - time diagrams of his work. A device for isolating a single pulse contains asynchronous triggers 1-5 of type RS, consisting of AND-NOT elements 6-15, AND 16, control bus 17, clock bus 18, and output bus 19. The device operates as follows. The low potential on the control bus 17 and the clock frequency present on the bus 18, the device is reset, in which the outputs of the flip-flops 2-5 and the output element And 16 there is a high potential. On entering the high potential control bus 17, depending on what potential was present at that time on the clock bus 18, the trigger 1 or the trigger 3 switches. If there was a pulse at the moment of the signal on the control bus 17 on the clock bus 18 5 5 the clock frequency (high potential), then the flip-flop 3 is switched. This prepares the flip-flop k for switching. Low potential, appearing on clock bus 18, switches trigger 1. Three | - ger 2 is kept in the initial state by a low potential, arriving at its element AND-HE 9 - Trigger V switches by a high potential, which is output from the element AND-NOT 7 flip-flop 1. Low potential from the output of the NAND element 13 flip-flop through the AND 1b element enters the output iny 19, switching the trigger 5, which returns the triggers 1 and 3 to the initial state. After the end of the clock pause at the output of the NAND 7 element of the trigger 1, a low potential is set, which returns to the initial state, and an output pulse coinciding in duration and phase with the clock frequency is output on the output bus 19 at the moment of arrival of the signal On the control bus 17 on the clock bus 18 there was a low flow 4, dial, then on the output bus 19, an output pulse is selected, which coincides in duration and phase with the clock pulse. Thus, for each control signal acting on the control bus 17, a single pulse is extracted on the output bus. Moreover, if the duty cycle of the clock pulses is equal to two, then the output pulse, regardless of the time of appearance of the pulse on the control bus 17, appears with a delay not exceeding half the period of the clock frequency. Claims An apparatus for isolating a single pulse containing an AND element, the first input of which is connected to the output of the first AND-NO element, the outputs of the first, second, third, fourth and fifth AND-NOT elements are connected to the first inputs of the sixth, seventh, eighth, respectively. , the ninth and tenth elements of the NAND, the outputs of the sixth, seventh, eighth, ninth and tenth elements of the NAND are connected to the first inputs of the first, second, third, respectively.