SU1451841A1 - Device for subtracting and extracting pulses - Google Patents

Abstract

The invention relates to a pulse technique and can be used in information control and processing devices, as well as in digital frequency synthesizers and frequency grid generators. The purpose of the invention is to increase the reliability of the device. The device contains the first D-flip-flop 1, the second D-flip-flop 2, the third D-flip-flop 3, the inverter 4, the first element AND 5, the bus 7 clock pulses, the bus 8 control pulses, the first output bus 9 and the second output bus 10. Introduction The second element And 6 allows the operation of the device with increased reliability. 1 il.

Description

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The invention relates to a pulse technique and can be used in information control and processing devices, as well as in digital frequency synthesizers and frequency grid generators.

The purpose of the invention is to increase the reliability of the device.

The drawing shows the functional scheme of the described device.

The device contains the first D-flip-flop 1, the second D-flip-flop 2, the third D-flip-flop 3, inverter 4, the first element And 5, the second element And 6, the bus -7 clock pulses, the bus 8 control pulses, the first output bus 9 and the second output bus 10. The bus 8 of control pulses is connected to the clock input of the second trigger 2, whose information input is connected to the common bus, and the inverse output to the information input of the third trigger 3; bus 7 clock pulses connected to the clock 25 input of the third trigger 3, the first input of the first element And 5, the second input of the second element And 6 and through the inverter 4 to the clock input of the first trigger 1, the inverse output of which is connected to the second input of the first element And 5 The output of which is connected to the first output bus 9, the first input of the second element I 6 is connected to the direct output of the third trigger 3, the installation input of the second trigger 2, and the information input of the first trigger 1, and the output to the second output bus 10.

A device for subtracting and extracting pulses operates as follows.

in a way.

In the initial state, the first trigger 1 and the third trigger 3 are in the zero state, and the second trigger 2 is in the single state. On the positive edge of the control impulse received from bus 8 to the clock input of the second trigger 2, the trigger 2 overturns, a unit level appears at its inverse output, which 50 prepares the third trigger for tilting.

The closest positive edge of the clock pulse from the bus 7, following the positive edge of the control pulse, the third trigger 3 overturns, at its direct output there is a unit level arriving at the first input of the second element

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Then 6. At the same time, the unit level arrives at the setup input of the second trigger 2, sets it to the initial single state, and at the information input of the first trigger 1, preparing it for tilting.

The clock pulse, the positive front of which appears next to the positive edge of the control pulse, is fed through the open second element 6 to its output. Thus, on the second output bus 10, there is a pulse synchronous and early in duration to the nearest clock pulse received after the positive edge of the control pulse. At the moment of formation of the negative front of the pulse selected at the output of the second element And 6, the first trigger 1 overturns, since its positive input of the inverted clock pulse from inverter 4 arrives at its clock input.

On the positive edge of the next clock pulse from bus 7, the third trigger 3 overturns and a zero level appears at its forward output. Since at this point in time at the inverse output of the first trigger 1 there is a zero level, this next clock pulse does not arrive at the output of the first element And 5. As a result, on the first output bus 9, the clock pulse that follows the selected bus 10 is subtracted from the sequence of clock pulses from bus 7. On the positive edge of the next inverted clock pulse from inverter 4, the first flip-flop 1 is reset to its inverse output A single level appears, which, arriving at the second input of the first element AND 5, permits the passage of 9 subsequent clocks to the bus 9.

Claims (1)

Invention Formula A device for subtracting and extracting pulses, containing three flip-flops, an inverter, the first I element, a clock bus, a control pulse bus, first and second output buses, a control pulse bus connected to the clock input of the second trigger, whose information input is connected to a common bus , -in 3 14518414 Versatile access - with the information that, for the purpose of entering the third trigger, the bus is also so reliable, it has entered all the pulses connected to the tact-second element I, the first input to the keto input of the third trigger, first connected to the right output the input of the first element And through the third trigger, the installation input-inverter to the clock input of the first and second trigger and information trigger, the inverse output with the second input of the first trigger, the second one connected to the second input The element is And, the output of which is connected to the pinch of the clock pulses, and the output is to the first output bus, which is the second output bus.