SU907553A1

SU907553A1 - Device for simulating process of control of reserves

Info

Publication number: SU907553A1
Application number: SU802901820A
Authority: SU
Inventors: Марк Вениаминович Александров; Валентина Борисовна Вербова; Юрий Дмитриевич Нечаев; Юрий Пейсахович Савицкий
Priority date: 1980-03-28
Filing date: 1980-03-28
Publication date: 1982-02-23

Description

Изобретение относится к вычислительной технике и может быть исполь’ зовано для моделирования систем управления запасами и других процессов массового обслуживания.The invention relates to computer technology and can be used for modeling inventory management systems and other queuing processes.

Известно устройство для моделирования систем массового обслуживания, содержащее генераторы случайного потока чисел, схему ЗАПРЕТ, реверсивный счетчик, блок случайных временных задержек, элементы ИЛИ, блок сравнения, элементы И, счетчики и генератор импульсов {j ].A device for simulating queuing systems containing random number stream generators, a PROHIBITION circuit, a reverse counter, a block of random time delays, OR elements, a comparison unit, AND elements, counters and a pulse generator {j].

Однако это устройство не предусматривает возможности прерывания потока на периоды, длительность которых распределена по заданному закону.However, this device does not provide for the possibility of interrupting the flow for periods whose duration is distributed according to a given law.

Наиболее близким по технической сущности к предлагаемому является устройство для моделирования процессов массового обслуживания, содержащее реверсивные счетчики, генератор случайных сигналов, элементы за10 держки, запоминающий блок, блоки индикации^].The closest in technical essence to the proposed is a device for modeling queuing processes, containing reversible counters, a random signal generator, delay elements 10, a storage unit, display units ^].

Недостатком известного устройства является то, что интенсивность потока запасаемого материала не изменяется в зависимости от состояния системы обслуживания.A disadvantage of the known device is that the flow rate of the stored material does not change depending on the state of the service system.

Цель изобретения - повышение точности моделирования.The purpose of the invention is to improve the accuracy of modeling.

Поставленная цель достигается тем, что устройство, содержащее первый генератор случайных сигналов, элемент задержки, реверсивный счетчик, первый и второй регистратор, дополнительно содержит генератор тактовых импульсов, элементы И, генераторы случайных сигналов, блоки сравнения триггеры, делители частоты и регистры памяти, причем выход генератора тактовых импульсов соединен с первыми входами первого и второго блоков сравнения, первого, второго, третьего и четвертого генераторов случайных сигналов, первого и второго j элементов И и через элемент задержки с первыми входами третьего, четвертого, пятого и шестого блоков сравнения, выход третьего элемента И подключен ко второму входу третьего генератора случайных сигналов, третий вход которого соединен со вторым входом первого генератора случайных сигналов, первым входом первого триггера и выходом второго триггера, ι первый вход которого подключен к выходу первого триггера, первому входу первого регистратора, третьему входу первого 'генератора случайных сигналов и первому входу третьего эле·, мента И, второй вход которого соединен с первым выходом третьего триг- V гера и вторым входом первого элемента И, выход которого подключен к первому входу седьмого блока сравнения, ₂второй вход которого соединен с выходом третьего генератора случайных сигналов и через первый делитель частоты с первым входом реверсивного счетчика, выход которого подключен ₂ко вторым входам третьего, четвертого, пятого и шестого блоков сравнения, выход первого генератора случайных сигналов соединен со вторым входом первого блока сравнения, выход которого подключен ко второму входу первого триггера, выход седьмого блока сравнения соединен со вторым входом второго триггера, выход первого регистра памяти подключен к третьему входу третьего блока срав- ³нения, выход которого соединен с первым входом третьего триггера, второй выход которого подключен ко второму входу первого регистратора, вы<£ι ход второго регистра памяти соединен с третьим входом пятого блока сравнения, выход которого подключен ко второму входу третьего триггера, выход четвертого элемента И подключен ко второму входу четвертого генера- ⁴¹тора случайных сигналов, третий вход которого соединен со вторым входом второго генератора случайных сигналов, первым входом четвертого триггера и выходом пятого триггера, пер- ⁵' вый вход которого подключен к выходу четвертого триггера, первому входу второго регистратора, третьему входу второго генератора случайных сигналов и первому входу четвертого ⁵элемента И, второй вход которого соединен с первым выходом шестого триггера и вторым входом второго элемен та И,, выход которого подключен к первому входу восьмого блока сравнения, второй вход которого соединен с выходом четвертого генератора случайных сигналов и через второй делитель частоты со вторым входом·реверсивного счетчика, выход второго генератора случайных сигналов соединен со вторым входом второго блока сравнения, выход которого подключен ко второму входу четвертого триггера, вход восьмого блока сравнения соединен со вторым выходом пятого триггера, выход третьего регистра памяти подключен к третьему гходу четвертого блока сравнения!, выход которого соединен с первым входом шестого триггера, второй выход которого подключен ко второму входу второго регистратора, выход четвертого регистра памяти соединен с третьим входом шестого блока сравнения, выход которого подключен ко второму входу шестого триггера.This goal is achieved in that the device containing the first random signal generator, delay element, reversible counter, first and second recorder, further comprises a clock generator, I elements, random signal generators, comparison blocks, triggers, frequency dividers and memory registers, and the output the clock generator is connected to the first inputs of the first and second blocks of comparison, the first, second, third and fourth random signal generators, the first and second j elements And and through h delay element with the first inputs of the third, fourth, fifth and sixth comparison blocks, the output of the third AND element is connected to the second input of the third random signal generator, the third input of which is connected to the second input of the first random signal generator, the first input of the first trigger and the output of the second trigger, ι the first input of which is connected to the output of the first trigger, the first input of the first recorder, the third input of the first 'random signal generator and the first input of the third eleme ·, ment And, the second input of which connected to the first output of the third trig- ger V and the second input of the first AND gate whose output is connected to the first input of the seventh comparison unit, ₂ a second input coupled to an output of a third random signal generator and through a first frequency divider to the first input of down counter, whose output ₂ is connected to the second inputs of the third, fourth, fifth and sixth comparators, the output of the first random signal generator is coupled to a second input of the first comparator, whose output is connected to the second input n the first- trigger seventh comparator output is connected to a second input of the second flip-flop, a first memory register output is connected to the third input of the third comparison unit ³ neniya whose output is connected to a first input of the third flip-flop, the second output of which is connected to the second input of the first recorder, you < £ ι the stroke of the second memory register is connected to the third input of the fifth comparison unit, the output of which is connected to the second input of the third trigger, the output of the fourth element And connected to the second input of the fourth generator ^{41 are} random x signals, the third input of which is connected to the second input of the second random signal generator, the first input of the fourth trigger and the output of the fifth trigger, the first ⁵ 'input of which is connected to the output of the fourth trigger, the first input of the second recorder, the third input of the second random generator and the first Valid fourth aND gate ^5, a second input coupled to the first output of the sixth flip-flop and a second input of the second aND element a ,, the output of which is connected to the first input of the eighth comparison unit, a second input kotorog connected to the output of the fourth random generator and through the second frequency divider with the second input trigger, the output of the third memory register is connected to the third output of the fourth comparison unit !, the output of which is connected to the first input of the sixth trigger, the second output of which is connected chen to the second input of the second recorder, the fourth memory register output connected to a third input of a sixth comparator whose output is connected to the second input of the sixth flip-flop.

На чертеже представлена схема предлагаемого устройства.The drawing shows a diagram of the proposed device.

Устройство содержит генераторThe device contains a generator

I тактовых импульсов, первый 2 и второй 3 генераторы последовательности случайных сигналов, элемент 4 задержки, реверсивный счетчик 5, первый 6 и второй 7 регистраторы, первый 8 и второй 9 блоки управления. Блок управления содержит блоки 10 иI clock pulses, first 2 and second 3 random signal generators, delay element 4, reversible counter 5, first 6 and second 7 recorders, first 8 and second 9 control units. The control unit contains blocks 10 and

II сравнения, регистры 12 и 13 памяти, триггер 14, генератор последовательности случайных сигналов содержит генераторы 15 и 16 случайных chi— налов, блоки 17 и 18 сравнения, триггер 19, триггер 20, элементы И 21 и 22, делитель 23 частоты.Comparison II, memory registers 12 and 13, trigger 14, a random signal sequence generator contains random chi-wave generators 15 and 16, comparison blocks 17 and 18, trigger 19, trigger 20, elements 21 and 22, frequency divider 23.

Устройство моделирует последовательность стохастических периодов работы и простоя двух технологических агрегатов с переменной производительностью, разделенных буферной емкостью. При этом генератор 2 определяет параметры функционирования первого агрегата, а генератор 3 ~ второго. Длительность работы и простоя распределены по различным законам, вырабатываемым соответственно генераторами 15 и 16 случайных сигналов. Производительность агрегата задается посредством делителя 23 частоты. Время простоя первого и второго агрегата регистрируется соответственно регистраторами 6 и 7. В регистрах памяти 12 блоков 8 и 9 усThe device simulates a sequence of stochastic periods of operation and downtime of two technological units with variable capacity, separated by a buffer capacity. In this case, the generator 2 determines the functioning parameters of the first unit, and the generator 3 ~ the second. Duration of work and downtime are distributed according to various laws generated respectively by generators of 15 and 16 random signals. The performance of the unit is set by means of a frequency divider 23. The downtime of the first and second units is recorded respectively by the registrars 6 and 7. In the memory registers 12 blocks 8 and 9 us

907553 6 танавливаются значения соответственно максимального и минимального возможных уровней материала в емкости, а в регистрах 13 памяти - соответственно значения уровня в емкости, по 5 достижении которого включается в работу первый агрегат, выключенный до этого сигналом по максимальному уровню материала в емкости, и уровня, по достижении которого включает- 10 ся второй агрегат, выключенный до этого сигналом по минимальному уровню в емкости.907553 6 sets the values of the maximum and minimum possible levels of material in the tank, respectively, and in the memory registers 13, respectively, the values of the level in the tank, upon reaching which the first unit is turned on, which was previously turned off by the signal for the maximum level of material in the tank, and the level, upon reaching which, a second unit is switched on, previously turned off by a signal at the minimum level in the tank.

Величина текущего запаса материала на складе моделируется с помощью 15 реверсивного счетчика 5·The value of the current stock of material in the warehouse is modeled using 15 reverse counter 5 ·

Блоки 17 и 18 сравнения вырабатывают на выходе единичный сигнал при несовпадении величин на входах.Blocks 17 and 18 of comparison produce a single signal at the output when the values at the inputs do not match.

Устройство работает следующим об- 20 разом.The device operates as follows 20 times.

В исходном положении на информационных выходах генераторов 2 и 3 вырабатываются нулевые значения сигналов. Триггер 20 установлен в по- 25 ложение 1, а триггер 19 - в положение О. В реверсивном счетчике 5 устанавливается исходная величина . Регистраторы 6 и 7 установлены в нулевое состояние. Триггер 14 уста- 30 новлен в состояние 1. При подаче пускового сигнала на вход генератора случайных сигналов 16 на его выходе формируется пачка импульсов, частота следования которых равна частоте им- _3Jпульсов генератора 1, длительность пачки импульсов подчиняется заданному закону распределения. Делитель 23 частоты позволяет изменять частоту следования импульсов в пачке. На- ₄₀личие одновременно сигналов на прямом и инверсном входах блока 18 сравнения приводит к установке на его выходе сигнала 0. При этом триггер 20 также установлен в состояние О, ₄₅ а триггер 19 ~ в состояние 1. Вход генератора 15 случайных сигналов .заблокирован, а сигнал 1 на его входе разрешения, поступающий с выхода триггера 19, позволяет сформировать случайное число, подчиняющееся заданному закону распределения.In the initial position at the information outputs of the generators 2 and 3, zero signal values are generated. Trigger 20 is set to position 25, and trigger 19 to position O. In the counter counter 5, the initial value is set. Registrars 6 and 7 are set to zero. Trigger 14 is set to state 1. When a trigger signal is applied to the input of the random signal generator 16, a pulse train is formed at its output, the pulse repetition rate of which is equal to the frequency of _3J pulses of the generator 1, the duration of the pulse train obeys a given distribution law. The frequency divider 23 allows you to change the pulse repetition rate in the packet. ₄₀ HA presence of both signals on the forward and reverse unit 18 inputs the comparison results in setting its output signal 0. In addition, the trigger 20 is also set to ON, a trigger ₄₅ ~ 19 to 1. Sign generator 15 .zablokirovan random signals, and the signal 1 at its resolution input, coming from the output of the trigger 19, allows you to generate a random number that obeys a given distribution law.

После вывода пачки импульсов с информационного выхода генератора 2 на счетчик 5 на выходе блока 18 сравнения вырабатывается сигнал 1”, устанавливающий триггер 20 в состояние 1, а триггер 19 - в состояние 0. При этом в генераторе 16 случайных сигналов формируется новое случайное число, а на выходе генератора 15 вырабатывается пачка импульсов, частота следования которых равна частоте импульсов генератора 1, а длительность пачки подчиняется заданному закону распределения. Сравнение кода содержимого счетчика 5 с кодами регистров 12 и памяти блоков 8 и 9 осуществляется в каждом такте по сигналу с выхода элемента 4 задержки. Если при выводе пачки импульсов с информационного выхода генератора 2 и сравнении кодов окажется, что содержимое счетчика 5 равно коду регистра 12 памяти, триггер 14 сигналом с выхода блока 10 сравнения установится в инверсное состояние. При этом через элемент И 22 заблокируется вход ввода генератора 16 случайных сигналов, и вывод пачки импульсов с информационного выхода генератора 2 прекратится, а на блокирующем выходе генератора 2 сигнал 1 сохранится, ₍так как тактовые импульсы на прямой вход блока 18 сравнения не поступают. Сигналы 1 на обоих входах регистратора 6 обеспечивают начало счета времени, который продолжается до тех пор, пока содержимое счетчика 5 не достигнет значения, заданного регистром 13 памяти, после чего срабатывает блок 11 сравнения, и триггер устанавливается в состояние 1. При этом снимается блокировка входа . ввода генератора 16 случайных сигналов, что обеспечивает продолжение вывода I прерванной пачки импульсов на реверсивный счетчик 5. Генератор 3 работает аналогично генератору 2, блок 9 “ аналогично блоку 8, а регистратор 7 “ аналогично регистратору 6.After the output of the pulse train from the information output of the generator 2 to the counter 5, the output of the comparison unit 18 produces a 1 ”signal, which sets the trigger 20 to state 1, and the trigger 19 to state 0. At the same time, a new random number is generated in the random generator 16, and at the output of the generator 15, a packet of pulses is generated, the repetition rate of which is equal to the frequency of the pulses of the generator 1, and the duration of the packet obeys a given distribution law. Comparison of the content code of the counter 5 with the codes of the registers 12 and the memory of blocks 8 and 9 is carried out in each cycle by a signal from the output of the delay element 4. If when outputting the burst of pulses from the information output of the generator 2 and comparing the codes, it turns out that the contents of the counter 5 are equal to the code of the memory register 12, the trigger 14 will be set to the inverse state by the signal from the output of the comparison unit 10. In this case, through the element And 22, the input input of the generator 16 of random signals is blocked, and the output of the pulse train from the information output of the generator 2 will stop, and signal 1 will remain at the blocking output of the generator 2 ₍ since there are no clock pulses to the direct input of the comparison unit 18. Signals 1 at both inputs of the recorder 6 provide the beginning of the time count, which continues until the contents of the counter 5 reaches the value specified by the memory register 13, after which the comparison unit 11 is activated, and the trigger is installed to state 1. At the same time, the input lock of the generator 16 of the random signals is released, which ensures the continuation of the output of the interrupted pulse train I to the counter counter 5. Generator 3 works similarly to generator 2, block 9 “is similar to block 8, and recorder 7“ is similar to registrar 6 .

Предлагаемое устройство может быть использовано для моделирования работы участков химико-технологического производства с несогласованной производительностью агрегатов, содержащих промежуточный склад полупродуктов, например, для технологических линий производства строительных материалов.The proposed device can be used to simulate the work of sections of chemical-technological production with inconsistent productivity of units containing an intermediate warehouse of intermediate products, for example, for technological lines of production of building materials.

Claims

(St) DEVICE FOR MODELING OF STOCK MANAGEMENT PROCESSES The invention relates to computing and can be used to model inventory control systems and other mass service processes. A device for simulating queuing systems comprising random number flow generators, a BREAK scheme, reversible counter, random time delay block, OR elements, comparator block, AND elements, counters and pulse generator 1, is known. However, this device does not allow the flow to be interrupted for periods the duration of which is distributed according to a given law. The closest in technical essence to the present invention is a device for simulating mass service processes, comprising reversible counters, a random signal generator, delay elements, a storage unit, display units 2J. A disadvantage of the known device is that the flow rate of the stored material does not change depending on the state of the service system. The purpose of the invention is to improve the accuracy of modeling. The goal is achieved by the fact that the device containing the first random signal generator, the delay element, the reversible counter, the first and second recorder, additionally contains a clock pulse generator, AND elements, random signal generators, comparison blocks, triggers, frequency dividers and memory registers the output of the clock generator is connected to the first inputs of the first and second comparison blocks, the first, second, third and fourth random signal generators, the first and second j elements And and through the delay element with the first inputs of the third, fourth, fifth and sixth comparison blocks, the output of the third element I is connected to the second input of the third random signal generator, the third input of which is connected to the second input of the first random signal generator, the first input of the first trigger and the output of the second trigger, the first input of which is connected to the output of the first trigger, the first input of the first recorder, the third input of the first random signal generator and the first input of the third I element, the second input of which It is connected to the first output of the third trigger and the second input of the first element I, the output of which is connected to the first input of the comparison unit seven, the second input of which is connected to the output of the third random signal generator and through the first frequency divider to the first input of the reversible counter, the output of which is connected to the second inputs of the third, fourth, fifth, and sixth comparison units, the output of the first random signal generator is connected to the second input of the first comparison unit, the output of which is connected to the second During the first trigger run, the output of the seventh comparison unit is connected to the second input of the second trigger, the output of the first memory register is connected to the third input of the third comparison unit, the output of which is connected to the first input of the third trigger, the second output of which is connected to the second input of the second recorder the memory register is connected to the third input of the fifth comparator unit, the output of which is connected to the second input of the third flip-flop, the output of the fourth element And by / | is connected to the second input of the fourth generator randomly x signals, the third input of which is connected to the second input of the second random signal generator, the first input of the fourth trigger and the output of the fifth trigger, the first input of which is connected to the output of the fourth trigger, the first input of the second recorder, the third input of the second random signal generator and the first input of the fourth element And, the second input of which is connected to the first output of the sixth trigger and the second input of the second element I, whose output is connected to the first input of the eighth comparison unit, the second input of which It is connected to the output of the fourth random signal generator and through the second frequency divider to the second input of a reversible counter, the output of the second random signal generator is connected to the second input of the second comparison unit, the output of which is connected to the second input of the fourth trigger, the input of the eighth comparison unit is connected to the second output the fifth trigger, the output of the third memory register is connected to the third control of the fourth comparison block), the output of which is connected to the first input of the sixth trigger, the second output of which is The key to the second input of the second recorder, the fourth memory output register connected to the third input of the sixth comparison unit, whose output is connected to the second input of the sixth flip-flop. The drawing shows a diagram of the proposed device. The device contains a generator of tactic pulses, the first 2 and second 3 generators of a sequence of random signals, a delay element k, a reversible counter 5, the first 6 and second 7 recorders, the first 8 and second 9 control units. The control unit contains blocks 10 and II comparisons, registers 12 and 13 of memory, trigger T, generator of a sequence of random signals contains generators 15 and 16 of random signals, blocks 17 and 18 of comparison, trigger 19, trigger 20, elements 21 and 22, divider 23 frequency. The device simulates a sequence of stochastic operation periods and just two process units with variable performance, separated by a buffer capacity. In this case, generator 2 determines the operating parameters of the first unit, and generator 3 of the second. The duration of the work and simply distributed according to various laws, produced respectively by the generators 15 and 16 random signals. The performance of the unit is set by means of a frequency divider 23. The time of the first and second units is recorded by the registrars 6 and 7, respectively. In the memory registers 12 of blocks 8 and 9, the values of the maximum and minimum possible levels of material in the tank are set, and in the registers of memory 13, the level in the tank, on reaching which the first unit is turned on, previously turned off by the signal at the maximum level of material in the tank, and the level at which the second unit is turned on, previously turned off by the signal at the minimum at the level in the tank. The value of the current stock of material in the warehouse is modeled using a reversible counter. 5 Blocks 17 and 18 Comparisons produce a single signal at the output if the values at the inputs do not match. The device operates as follows. In the initial position, the information outputs of the generators 2 and 3 produce zero values of the signals. The trigger 20 is set to position 1, and the trigger 19 is set to position O. In the reversible counter 5, the initial value is set. Registrars 6 and 7 are set to zero. The trigger I is set to state 1. When the start signal is applied to the input of the generator of random signals 16, a packet of pulses is formed at its output, the frequency of which is equal to the frequency of the pulses of generator 1, the duration of the packet of pulses obeys the specified distribution law. Frequency divider 23 allows the pulse frequency to be varied in a burst. The presence of signals at the direct and inverse inputs of the comparison unit 18 simultaneously leads to the installation of the O signal. At this, the trigger 20 is also set to the state O, and the trigger 19 is set to state 1. The input of the generator 15 random signals is blocked and the signal 1 at its resolution input, coming from the output of three hera 19, allows to form a random number, subject to a given distribution law. After the pulse batch is output from the information output of the generator 2 to the counter 5 at the output of the comparison block 18, a signal 1 is generated, which sets the trigger 20 to the state 1, and the trigger 19 - to the state O. A new random signal is generated in the generator 16 random signals a number, and at the output of the generator 13 a burst of pulses is produced, the frequency of which is equal to the frequency of the pulses of the generator 1, and the length of the burst follows the specified distribution law. The comparison of the content code of the counter 5 with the codes of the registers 12 and 13 of the memory of blocks 8 and 9 is carried out in each clock cycle by a signal from the output of the delay element i. If, when outputting a burst of pulses from the information output of generator 2 and comparing codes, it turns out that the contents of counter 5 is equal to register register 12 of memory, trigger 1 by the output of the comparison unit 10 will be set in the inverse state. At the same time, through input element 22, the input of generator 1b of random signals is blocked, and the output of the burst from the information output of generator 2 is stopped, and at the blocking output of generator 2, signal 1 is saved, as the clock pulses do not arrive at the direct input of t8 comparison unit. Signals 1 on both inputs of recorder 6 provide the start of the counting time, which lasts until the contents of counter 5 reaches the value specified by memory register 13, after which the comparison unit 11 is triggered and the It trigger is set to state 1. At the same time blocking the input, input of the generator 1b of random signals is removed, which ensures continuation of output 1 of the interrupted pulse train to the reversible counter 5. Generator 3 works similarly to generator 2, block 9 is similar to block B, and recorder 7 is similar to reg the stator 6. The proposed device can be used to simulate the work of chemical production areas with inconsistent performance of aggregates containing intermediate intermediate products, for example, for production lines of construction materials. Claims of Invention A device for modeling inventory management processes, containing -. A first random signal generator, a delay element, a reversible counter, a first and a second recorder, characterized in that, in order to improve accuracy, it further comprises a generator of tact pulses, AND elements, random signal generators, comparison units, triggers, frequency dividers and registers., and the output of the clock pulse generator is connected to the first inputs of the first and second comparison blocks, the first, second, third and fourth random signal generators, the first and second And elements and the delay element - with the first inputs of the third fourth, fifth and sixth comparison blocks; the output of the third element is connected to the second input of the third random signal generator, the third input of which is connected to the second input of the first random signal generator, the first input of the first trigger and the output of the second trigger first input which is connected to the output of the first trigger, the first input of the first recorder, the third input of the first random signal generator and the first input of the third And element, the second input of which is connected En with the first output of the third trigger and the second input of the first element And, the output of which is connected to the first input of the seventh comparison unit, the second input of which is connected to the output of the third random signal generator and through the first frequency divider to the first input of the reversible counter, the output of which is connected to the second inputs the third, fourth, fifth, and sixth comparison blocks, the output of the first random signal generator is connected to the second input of the first comparison block, the output of which is connected to the second input of the first trigger a, the output of the seventh comparison unit is connected to the second input of the second trigger, the output of the first memory register is connected to the third input of the third comparison unit, the output of which is connected to the first input of the third trigger, the second output of which is connected to the second input of the first recorder, the output of the second memory register They are connected to the third input of the fifth comparator unit, the output of which is connected to the second input of the third trigger, the output of the fourth element, AND is connected to the second input of the fourth random signal generator, the third input which is connected to the second input of the second random generator, the first input of the fourth trigger and the output of the fifth trigger, the first input of which is connected to the output of the fourth trigger, the first input of the second recorder, the third input of the second random generator and the first input of the fourth And element, the second input of which connected to the first output of the sixth trigger and the second input of the second element I, the input of which is connected to the first input of the eighth comparison unit, the second input of which is connected to the output of four That random signal generator and through the second frequency divider with the second input of the reversible counter, the output of the second random signal generator is connected to the second input of the second comparison block, the output of which is connected to the second input of the fourth trigger, the output of the eighth comparison block is connected to the second input of the fifth trigger, the output of the third the memory register is connected to the third input of the fourth comparison unit, the output of which is connected to the first input of the sixth trigger, the second output of which is connected to the second input of the second p recorder of the fourth memory register output connected to a third input of the sixth comparison unit, whose output is connected to the second input of the sixth t1eiggera. Sources of information taken into account during the examination 1. USSR author's certificate number 50178, cl. G O F 15/20, 197. 2, USSR Copyright Certificate No. ii8l900, Cl, G O F 15/20, 1975 (prototype).