SU1513622A1 - Code-to-time interval converter - Google Patents

Description

The invention relates to the field of computing and can be used in modeling complexes and information-measuring

The invention relates to computing and can be used in modeling complexes and information-measuring systems.

The purpose of the invention is the expansion of the scope due to the implementation of a range of generated conversion characteristics. .

The drawing shows a structural electrical circuit of the Converter.

The converter code in the time interval contains the generator 1 pulses, the element And 2, the first counter 3 pulses, the buffer register 4, register 5, the microprocessor (MP) 6, the selector 7 addresses, block 8 comparison, a storage device (memory) 9, the element And 10 , pulse counter 11, comparison unit 12, pulse shaper 13, output bus 14, tires 15

2

systems. The purpose of the invention is the expansion of the scope of aa through the implementation of a wide range of generated characteristics. The code to time converter contains two pulse counters, two code comparison blocks, two buffer registers, a register, a pulse generator, two AND elements, a pulse shaper, an OR element. An address selector, a microprocessor and a memory device are entered into the converter, the input outputs of which are respectively connected, which provides high flexibility in the formation of simulated characteristics. 1 il.

control, buffer register 16, element OR 17. Through the control bus 15 using an external interface device, the converter can be connected to the control computer (shown by a dotted line).

In MP 6, one of the general-purpose registers is used as a period counter, and memory 9 contains a permanent storage device (ROM) and a random access memory (RAM).

Target conversion is operationally formation time slot T corresponding, for example, the frequency characteristic of the real static simulated sensor data without prior treatment to obtain this characteristic _s

WITH

$

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The characteristic of a real sensor is non-linear and can be considered as consisting of linear and non-linear parts. The input 1-bit code, $ imitating the time interval T, represents the sum of binary digits 1 = m + n ,. where m is the high order, and η is the low order. Higher digits u correspond to the linear part of the model characteristics of the sensor, and low η - nonlinear parts of the characteristic.

The total number of digits 1

and depends on the required conversion accuracy ς, imposed on the modeled characteristic of the sensor £ (x). AT

one

turn, d £ ^{depends on the hour_} 20

clocks of the clock generator £ and the number of the least significant digits of n. The given relations are taken into account when choosing the elements of the converter circuit.

So the number of digits counter 3 25

is chosen equal to w discharges, and the number of discharges of the counter periods MP 6 and RAM in memory 9 - η discharges.

Thus, in order to ensure the required accuracy η for the cycle of education, the period counter MP ό (until the moment of filling) should form a sequence of 2 time intervals.

In addition to performing the task of converting a code into a time interval in this case, using MP 6 and memory 9, which simulate any characteristic from a selected family of sensors, the converter allows you to control the accuracy of the generated characteristic.

This is achieved by comparing the obtained characteristic with the characteristic of the reference sensor, information 45 of which is stitched in the ROM included in the memory 9. If the obtained characteristic does not meet the requirements, then the converter allows you to quickly change the simulated characteristic.

The operation of the Converter is as follows.

Before working on the installation signal "O", coming through the element OR 17 to the installation inputs of the counters 11, 3 and register 5, the counters are reset to the "O" and recorded

input codes in registers 4, 5 and 16 by the recording signal from the address selector 7.

Registers 4 and 5 are written high (n) bits of the input code 1 (1 = w + n), which reproduces the linear part of the characteristic (time interval), and in register 16 - data for the formation of an additional time interval, which reproduces the nonlinear part of the characteristic.

In this case, the corresponding information is recorded in registers 5 and 16 for the formation of the first current period, and the buffer register 4 is information (codes T of the most significant digits) for the formation of the second current period. This is necessary to ensure reliable recording of information about the second current period in register 5 immediately after the appearance of the signal "Interrupt '2", due to the fact that the additional time interval is less than the time interval corresponding to the linear part of the characteristic.

After this, generator 1 starts producing clock pulses, coming through element 2 at the input of counter 3, the output code of which is compared with the input code of register 5 in block 8. If these two codes coincide, block 8 generates a signal "Interrupt 1" of microprocessor 6 , thereby terminating the formation of a time interval, the duration of the corresponding linear part of the characteristics of the simulated sensor. For this signal, MP 6 adds one to the contents of the period counter, prepares information about the additional time interval of the next current period (in this case, the second one), generates a Record signal in the selector 7, and controls the high-order input codes T.

At the same time, the signal from the output of block 8 through the element AND 2 prohibits the counting of pulses from the output of generator 1 to the input of counter 3, and the converter proceeds to the formation of an additional temporary interval of the current period.

Allow signal from the output of the block

8 allows the passage of pulses

generator 1 through element 10 on

five

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the counting input of counter 11. Counter 11 counts these pulses until its output code equals the code in the buffer register 16. At $ this time and the output of block 12, the signal “Interrupt 2” appears, which through the driver of 13 pulses and the element OR 17 resets counters 3,

11 and register 5, ending with the formation of the first current period. In this case, the information prepared by the microprocessor 6 for the formation of the next current period is rewritten, respectively, in the buffer registers 4,

16 and register 5.

Strobe pulse to the input unit 12 from the output of the generator 1, provides a stable output signal, and the pulse to the input unit 12 from the output of block 8, allows the formation and output of the output pulse to the output bus 14 and the imaging unit 13.

The formation of the second, third and subsequent time intervals is similar. Moreover, each time interval formed by the period counter is recorded in the MP 6.

Immediately after filling in the period counter MP 6 in RAM 9, information ^{1 is} updated, and after the converter Σ ^ -γο issues the “Interrupt 2” signal in MP 6, the conversion of the modeled signal ends. In this case, if there is a permitting signal in the selector 7, updated codes and data are recorded in registers 4,

5 and 16.

Thus, the time interval simulated for a cycle is equal to the sum of the intervals of all current periods, each of which contains a constant time interval corresponding to the high-order code, and an additional time interval, the duration determined by the results of processing and analyzing the nonlinearity of the simulated characteristic.

Claims (1)

Claim A code to time converter containing the first and second pulse counters, the first and second 15 20 25 35 40 45 50 buffer registers, first and second code comparison blocks, a register whose outputs are connected to the corresponding first inputs of the first code comparison block, the second inputs of which are respectively connected to the outputs of the first pulse counter, the setup input of which is combined with the installation input of the second pulse counter and connected to the output element OR, and the counting inputs of the first and second pulse counters are respectively connected to the outputs of the first and second elements AND, the first inputs of which are combined with the first gate the second input of the code comparison unit and connected to the output of the pulse generator, and the second inputs are combined and connected to the output of the first code comparison unit, and a pulse shaper, the output of which is connected to the first input of the OR element, and the input is the output bus and connected to the output of the second block comparison of codes, the first information inputs of which are connected to the corresponding outputs of the second pulse counter, differing in 30 in order to expand the scope by implementing a wide range of conversion parameters, a microprocessor, a memory and an address selector are entered into it, the inputs / outputs of which are respectively combined with the second input of the OR element and the information inputs of the first and second buffer registers and are corresponding control buses, while the additional outputs of the address selector are respectively connected to the inputs synchronization of the first and second. Buffer registers whose outputs are respectively connected to the information inputs of the register and the second information inputs of the second code comparison block, the second gate input of which is combined with the first microprocessor interrupt input and connected to the output of the first code comparison block, the second microprocessor interrupt input combined with the first element input OR, the output of which is connected to the synchronous input. register. 55 1513622