SU1478335A1 - Code-to-time-interval converter - Google Patents

Abstract

The invention relates to computing and can be used in information-measuring systems and modeling complexes. The purpose of the invention is to improve the accuracy and enhance the functionality by implementing various transformation characteristics. The output time interval formed by the transducer is added up from the main (linear part) and additional (nonlinear part) intervals. In this case, the main interval is formed by comparing in the first block of comparison the codes of the first register and the first pulse counter, counting the pulses of the pulse generator. The additional interval is also formed by comparing in the second block a code comparison, counted by the third pulse counter (from a pulse generator), and a code received from a group of permanent memory devices (ROM). The formation of the required code at the output of the ROM group is carried out using a second register, a second pulse counter, a decoder, and a code master. 2 Il.

Description

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The invention relates to computing and can be used in information-measuring systems and modeling complexes.

The purpose of the invention is to improve the accuracy and enhance the functionality by implementing various conversion characteristics.

The drawing shows a code to time converter.

1 shows a block diagram of a code converter in a time interval; Fig. 2 is a timing diagram for explaining the operation of the converter.

The Converter code in the time interval (figure 1) contains a generator

2

1 pulses, element AND 2, registers 3 and 4, element OR 5, counter 6 pulses, unit 7 comparison, counter 8 pulses, permanent memory (ROM) 9, element AND 10, counter 11 pulses, unit 12 comparison, driver 13 pulses, input buses 14, control bus 15, output bus 16, code setpoint generator 17, decoder 18, ROM group 19, OR element 20, installation bus 21.

The task of conversion is as follows. In accordance with the frequency response of the sensor f (x), it is necessary to form a time interval T.

& one

00

with

00 SL

The sensor characteristic is non-linear and can be considered as consisting of two parts: linear and non-linear. The input 1-bit code, imitating the output time interval T, is the sum of the binary bits, where ha is the highest bits; n - younger. Higher m correspond to the linear part of the simulated sensor characteristic, and the lower n correspond to the nonlinear part of the characteristic of this sensor. The total amount of bit J is determined from the ratio

1 1Ј2 and depends on the required

the accuracy of the conversion q, imposed on the simulated characteristic of the sensor f (x), In turn, q

frequency dependent

-one-

generator f and the number of the least significant bits of the p. The relations given are taken into account when choosing the elements of the converter circuit. Thus, the number of bits of counter 6 is chosen equal to m bits, and counter 8 is n bits. In order to ensure the required accuracy q for the conversion cycle, the counter 8, before filling, must form a sequence of 2 periods of time intervals.

Converter with one ROM works as follows.

Before starting work on the signal coming from the computer to the bus 21, all counters are reset to the zero state and the input code is recorded in registers 3 and 4. After that, the pulse generator 1 begins to generate clock pulses arriving through the AND 2 element at the counter input b, the output code of which is compared with the input code of register 3 in block 7. If these two codes coincide, block-7 generates a potential, which is fed to the counting input of counter 8 to form the address of the 1st current period. At the same time, the potential from the output of block 7 through the element AND 2 prohibits the counting of pulses from the output of the generator 1 to the input of counter 6, stopping

thereby forming a temporary

the interval corresponding to the linear part of the characteristics of the simulated sensor. Next, the converter proceeds to the formation of additional

„

15

20

25 30

35

40 45 Q

55

time interval (LB1) at the address of the 1st current period. The duration of the DWI for each of the 2P periods is determined by the encoding of the ROM 9, which is programmed and executed — in advance in accordance with the analysis of the nonlinear part of the characteristic f (x), and also depends on the input code written in register 4,

I

The formation of DWI is carried out as follows. The address of the 1st current period of counter 8 and the input code in register 4, as well as the signal that allows reading information from ROM 9, selects data (code) arriving at block 12 for comparison with the output code of counter 11, which after coming to Element 10 of the resolving potential from block 7 begins to count clock pulses from generator 1, block 12, when ROM 9 codes are equal and counter 11 generates a potential that, through a driver, 13 pulses and element OR 5, flushes counters 6 and 11, at the time of zeroing formation is completed time interval of the 1st current period. The process of forming the 2nd, 3rd,,, periods is carried out similarly until the moment of filling the counter 8, which corresponds to 2 periods - the conversion cycle. A building pulse arriving at the input of unit 12 ensures a stable output signal. Thus, the time interval T simulated by the converter for a cycle is equal to the sum of the intervals of all 2n periods, and the time intervals of each period contain intervals of a constant duration (determined by the input register code 3) and DWI of different duration (determined by the encoding of the ROM 9 and changing the register code 4 ).

Depending on the setter 17 code, using the decoder 18 allows you to select any ROM from the group and, thus, expand to 2 the number of simulated sensor characteristics, where k is the number of decoder inputs, and since each ROM is mounted to an individual block , which should be inserted into the response jacks on the converter board, the number of simulated 2K characteristics can be increased

To install new ROMs in the group or change the entire ROM group,

Claims (1)

Invention Formula A code converter to a time interval containing the first and second registers, the information inputs of which are corresponding to the first and second input buses, and the outputs of the first register are connected to the first inputs of the first code comparison block, the pulse generator, the first and second elements AND, the first inputs of which are combined and connected to the output of the pulse generator, and the second inputs are combined and connected to the output of the first code comparison unit, the first pulse counter, the counting input of which is connected to the output of the first element a And, and the outputs with the second inputs of the first block of comparison codes, the output of which is connected to the counting input of the second pulse counter, the outputs of which are connected to the corresponding first inputs of the permanent storage device, the second inputs of which are connected to the corresponding outputs of the second register, and the pulse shaper, the input of which is an output bus, characterized in that, with the aim of increasing the accuracy and expanding the functional capabilities due to the implementation of various conversion characteristics, into a code setter, a decoder, a group of permanent storage devices, two OR elements, a third pulse counter and a second code comparison unit, strobe 356 are entered look for the input of which is connected to the output of the pulse generator, and the first information inputs are respectively connected to the outputs of the third pulse counter, the counting input of which is connected to the output of the second element I, and the installation input is combined with the installation input of the first pulse counter and connected to the output of the first element OR, the first input of which is combined with the installation inputs of the second pulse counter and the first register and the first input of the second element OR and is the installation bus, and the second input of the first element OR is the control bus and is connected to the output of the pulse shaper, whose input is connected to the output of the second code comparison unit, the second inputs of which are connected to the outputs of the persistent storage device and the outputs of the permanent storage devices of the group, the first inputs of which are combined and connected to the corresponding outputs of the second pulse counter, the second inputs are combined and connected to the corresponding outputs of the second register, while the third inputs permanent memorizing mouth The artefacts and permanent memory devices of the group are combined and connected to the output of the first code comparison unit, and the fourth inputs are respectively connected to the outputs of the decoder, the inputs of which are connected to the corresponding outputs of the code master, and the installation input of the second register is the third input bus. 1 fnt JinJinnnnmOMJUinnnmUT 1 p. Howl STV tp.  VyhBS YaodRgB „00 You ROM 9 & ЫХБС11 ВыЛШ43 Howl 6S7 g Code Pr f / .10 L Jl Code PrL-NumberD8Ya Ooo-oj-1 Yu-2 PI