SU1461230A1 - Device for checking parameters of object - Google Patents

Abstract

The invention relates to automation and can be used in automated process control and monitoring systems. The purpose of the invention is to increase the speed and reliability of the device. The device contains 1 m 2 sensors of monitored parameters, a group of interface blocks 3, a trigger 4 for setting the operating mode, a group of blocks for generating code 5, switches 6 and 14, a block 8 for synchronization, a block 9 for initial setup, elements OR 11, AND 12, a generator 10 clock pulses, trigger 13, a group of blocks of counters 18 and the receiving register 17. Improving the reliability of the device is provided by duplicating sensors of monitored parameters and hardware metering of functional connections reflecting the logic of the control process in block 5 ation code. The increase in speed is achieved by transferring only the changed part of the parameter approach. 8 il. (L with

Description

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The invention relates to automation and can be used in automated process control and monitoring systems.

The aim of the invention is to increase the speed and reliability of the device.

Figure 1 shows a diagram of a device for monitoring object parameters; Fig. 2 is a diagram of an interface unit; FIG. 3 is a diagram of a code generation unit; figure 4 - scheme of the encoder; figure 5 is a diagram of the first switch; on figb diagram of the synchronization unit; 7 is a diagram of the second switch; on Fig diagram of the block counters.

A device for monitoring object parameters consists of sensors 1i-lN and 2i-2N of monitored parameters of the first and second groups, a group of 3i-3N conjugation blocks, a trigger 4 for setting the operation mode, a group of 5i-5N code generation units, the first switch 6, the first address input 7. synchronization block 8, initial setup block 9, 10 clock pulse generator, element OR 11, element 12, trigger trigger 13, second switch 14, second address input 15, group of 16i-16Ni blocks of counters receiving groups of 17- 17N, start input 18, input 19 and 20, setting the first and second modes of operation.

Block 3 of the interface (see FIG. 2) consists of the first 21 and second 22 blocks of elements. The block 23 of the OR elements.

The code generation unit 5 (see FIG. 3) consists of a group of encoders 24i-24/5.

The encoder 23 (see FIG. 4) consists of the group of registers 25i-255, the first 2b1-2bz, the second 271-27z, the third 281-28z, the fourth 291-2.9z and the fifth 301-304 groups of elements I. the group of triggers 31i -3l4, the group of elements OR 321-324, the group of elements EXCLUSIVE OR 331-334, the first element OR 34, the trigger 35 and the second element OR 36.

The first switch 6 (see Fig. 5) consists of the first 37 and second 38 blocks of the OR elements, the first 39 and second 40 blocks of the OR elements, and the address decoder 41. The synchronization unit 8 (see Fig. 6) consists of the group of counters 421-424, the group of elements AND 431-434, the group of elements EXCLUSIVE OR 44i-444 and the elements OR-HE45 and 46.

The second switch 14 (see Fig. 7) consists of the first 47 and second 48 blocks of the elements And and the address decoder 49.

Block 16 counters (see Fig.8) consists of a group of counters 50i-504 and a group of elements And 511-514.

The device works as follows.

Before starting work, a code is entered into the registers 25–254 of each encoder. corresponding to the functional connections of the control unit blocks. Input 19 or 20

0 a signal is received from the operating mode of the device, according to which the trigger 4 is transferred to a state that enables the connection of sensors of the monitored parameters of the corresponding group.

5 When the supply voltage is applied, block 9 generates a pulse that sets the trigger 13 through the element OR 11, as well as entering the second control inputs of the blocks 5i-5N. sets the register 255 in О, through the element OR 36 - the trigger 35, and through the elements OR 32i-324 - the triggers 31 1-314. At the same time, an impulse arriving at the installation inputs is formed in the blocks of the receiving registers 17i-17N.

5 in О the corresponding blocks of counters 16 and the group of counters 501-504 that sets in О.

In the case of the first mode of operation of the device, when the sensors of the monitored parameters of the first II-IN group are intact, information 16-bit codes from the outputs of these sensors go to the first block of elements AND 21 interface blocks 3i-3N, which are open with a resolving potential with direct output of the trigger 4, and then through the elements of OR of block 23 arrive at the information inputs of the blocks 3i-3N. In the case of the second mode of operation of the device, i.e. sensors 1i-lN are faulty,

0, the 2i-2N sensors are connected through an AND 22 block of elements, which are opened by the resolving potential from the inverse output of the trigger 4,

The information 16-bit codes from the information outputs of the 3i-3N units are fed to the information inputs of the respective blocks and four bits each (from 0 to 15) are added to the information inputs of the 24i-244 encoders. So

In this way, four sub-codes of the input information 16-bit code are formed, each of which is positional unitary.

As a result, at the exits of the group

5 flip-flops 311-314 of each encoder 24 of block 5, taking into account the values of the registers 25−254. A positional four-bit binary code is generated, which through the elements EXCLUSIVE OR 33i-334 and OR 34 sets in 1 trigger 35. through the elements AND 30i-304 it records in the register 255 and enters the information outputs of the encoder. A single signal at the output of the trigger 35 is stored until the end of the information transfer session and is set to 0 by the signal from the first control input of the encoder, Hps-i, when the next four-digit position code appears at the output of the trigger 311-31-9 different from the previous code, the value which is stored in register 255, from the corresponding outputs of the EXCLUSIVE OR elements 33i-334, single pulses appear, which characterize the discrepancy between the bits of the previous and current codes, which arrive at the element OR 34. Due to This newer code value is written in e register 255 and arrives at the outputs of the encoder 24. Thus, at the information outputs of each of the drivers 5, only four four-bit subcodes of the 16-bit information coding appear: the values of the codes have changed in From the previous session of the LM-session of the transfer of information, the control output contains a positional four-bit control code, the position of the individual discharges of which characterizes the position (address) of the specified subcodes in the information code. 16-T: L bit code.

Session transfer; The information happens as follows o6pa3c.vi.

The control system sets the first address input 7 of the switch 6 to the address of the uniformed form / code 5, the outputs i have the required information, address of the output group of the switch 14, which is required transfer information. At the same time, at the output of the switch decoder 41, an address unitary code is generated that gates the inputs of the corresponding elements AND blocks 37 and 38.

As a result of this, the corresponding information and control signals through the elements OR 39 and 40 arrive at the same outputs of the switch 6.

Since block 8 is in preset mode (there is a zero value from the output of trigger 13 at the recording input), then single signals are sent through the OR-HE 46 element to the recording inputs of counters 42-424. As a result, the information 16-bit code and the four-bit control code from the corresponding outputs of the switch 6 are fed to the information and control inputs of the synchronization unit 8. The values of each information subcode are written to the corresponding counter 421-424. The unit values of the bits of the four-bit control code from the group of control inputs of block 8 gate the corresponding elements 5431-434. If the values of any of the counters 42i-424 are equal to zero, then this is zngch1 / n, that the corresponding code will not change, and the input element of the corresponding AND 43 TSKxe element will be zero, and

10 of the corresponding element EXCLUSIVE OR group 44 is a zero value. When the output of all elements EXCLUSIVE OR is zero, the output of the element OR NOT 45

15 according to Wits a single signal, incoming 4S inputs for setting zero of the counters of group 421-424 and the output of the Sync block. At the same time, the existing unit values at the outputs of the credit indicator of the group counters

0 is zeroed out, and a single impulse appears at the sync output of block 8, characterizing the end of the P8p8 data transfer session.

The control system outputs to input 18

5 single trigger pulse, which fixes the level of a logical unit at the output of trigger 13. At this m, for block 8, the counting mode and pulses from the generator 10 through element I 12 enter the coaxial inputs of block 8 and switch 14. At a given address, the output of the decoder 49 of switch 14 forms a unitary address code and gates the corresponding groups of elements And blocks 47 and 48. At the same time, the control and clock inputs of the corresponding block of counters 15; They are respectively assigned to one of the N control and N clock outputs of the switch 14. The generator 10 pulses pass

0 only through the elements And 51i-5l4, on the second inputs of which there are single signals, while in the corresponding counters of group 42 of fleas 8 there are no single signals of loan signs, i.e. The values of these counters are zeroed.

When a single signal of the loan attribute coincides, the output of a specific counter of group 42 with the corresponding single control signal at the output of the corresponding element EXCLUSIVE OR of group 44 of block 8 will be set to zero, which is transmitted to the corresponding control input of the specified counter block 16 and

5, the gating of the corresponding counter 50i-504 of group 5lo:; ee 16., which records the number of pulses of the generator 10c at the moment when a single impulse at input 18 arrives until the coincidence of the indicated ones

signals in block 8. When there is a zero control code at the control output of block 8, the output of the synchronization of block 8 has a single pulse that goes to the first control inputs of the code generation blocks 5i-5N and through the OR 36 element each, the block will set triggers 35 to zero,

In addition, this pulse through the element OR 11 will bring the trigger 13 to the zero state and block 8 will be set to the preset mode. At this time, the information transfer session ends.

The clock generator in each block of receiving registers 17i-17N generates pulses of duration T + T, where T is the period of the pulse sequence of the generator 10, and r is selected based on the required speed. If after the time T + ts the moment of arrival of the last pulse of generator 10 to the synchronization input of the corresponding block of the receiving register of the new pulse is not received, then the information is overwritten in the block and the transmitted information code appears at the information output of the block of the receiving register.

Claims (1)

Invention Formula A device for monitoring object parameters containing the first sensor group of monitored parameters, the first and second switches, the initial setup block, the clock pulse generator, the AND element, the OR element, the trigger trigger, a group of blocks of counters and receiving registers, the first input of the first switch device address input, the output of the setup block is connected to the first input of the OR element, the output of which is connected to the zero input of the trigger trigger, a single input of which is connected to the start input device, and a direct output - to the first input of the AND, the second input of which is connected to the house The yields of the clock, and an output - to a clock input of the second switch, whose address input is connected to the second address input Arrange and clock outputs to the clock inputs of blocks of group counters and receiving group registers, groups of information outputs of each of which are connected to a group of information outputs of a device of a group of information inputs with groups of information outputs of the corresponding blocks of group counters, and a control output with an input installation in the counter unit of the corresponding group, characterized in that, in order to improve the speed and reliability of the device, the second group of sensors monitored by pairs was introduced into it ters, group interface blocks trigger setup operation mode, a group code generating unit and the synchronization unit. the unit input of the trigger for setting the operating mode is connected to the input for setting the first operating mode of the device, zero input for the installation of the second operating mode of the device, and direct and inverse outputs for the first and second control inputs of the interface units, first and second groups, respectively informational inputs of which are connected to the sensor output group of the monitored parameters of the first and second groups, respectively, and the group of information outputs to the groups of the same name inputs of the corresponding blocks of fop and proBan group codes, the first control inputs of which are connected to the second input of the OR element and, with the synchronization clock output, the second control inputs to the output of the initial setup block, and the groups of information and control outputs to the groups of like inputs of the first switch, groups of information and the control outputs of which are connected to groups of like inputs of the synchronization block, the control input of which is connected to the trigger trigger output, the clock input to the output of the AND element, and the group of control outputs - a group of control inputs of the second kommutatorz controlled group which guides the outputs are connected to inputs of the respective blocks of similar counters group. , .3 xi nsr. Fiz. FIG. five L. Fiz.V .F / h. 7 g Coolant Yg / U. About Us / p, / U.& gustb I U I VfUMq). f6 503 50z SO, r ShinsprtUHCp. f4HCp. About Fie.8