SU1656511A1 - Digital function separator - Google Patents

Abstract

The invention relates to computing and can be used for instrumental realization of analytical functions in specialized and universal digital devices while reducing the size of the permanent storage device. The generator contains serially connected counter 1, address decoder 2, memory block 3, first adder 4, first switch 5, multiplier 6 second switch 7, as well as buffer register 8, second and third adders 9, 10, synchronization unit 11 and AND element 12. The generator allows to calculate the value of the function and its first derivative on the basis of the values of these quantities at the previous point of the argument change and the values (increments) stored in the memory of the second derivative of the function formed accordingly without accumulating an error griding to the end of each approximation interval. 1 or

Description

The invention relates to computing and can be used to reproduce smooth functions in specialized computers.

The purpose of the invention is to reduce memory and increase accuracy.

The drawing shows the functional diagram of the digital generator function.

The digital function generator contains a counter 1, a decoder 2 addresses, a block 3 of the increment memory of the second derivative, the first accumulating adder 4, the first switch 5, the multiplier 6, the switch 7, the buffer register 8, the second accumulating adder 9, the third accumulating adder 10. block 11 synchronization, element And 12.

The generator operates as follows.

The calculation of the function values in the proposed digital generator is made on the basis of a twofold

integrating numerically the step function, which is the second derivative of the function, designed to perform an approximation of the boundary conditions for the function and its first derivative on each interval.

The value of the first derivative of the function at the next point is calculated by the formula

Yo

about ate about ate

Y (xM) Y (xi) - i 0, l / 2.

Y (xi)

Dx +

Y (xi) 2

Ah (1)

where Y (XI) is the value of the first derivative of the function at the previous point of the argument change;

Y (XI) is the value of the second derivative of the function, which is formed in advance based on the fulfillment of the boundary conditions for the function and its first derivative at each approximation interval Dx (hereinafter indicated by the index x)

And

V (xi) Y (xL),, m

1 when xj xi xj + A x / 2,

D x 2 when xj + -y- xi xj -f 1

te y (xj,

) changes with step Lx / 2,

Ah - the value of the interval of approximation;

m is the number of approximation intervals;

Oh

Ah p

- the size of the integration step; n is the number of integration steps in the approximation interval.

As a result of repeated integration of the first derivative of the function (by the trapezoid method), a piecewise quadratic approximation of the given function is obtained.

w / 1 h,, l Y (X,) + Y (XI + 1).

Y (xn-1) Y (x,) + - -L-; p - Ax

 V (x.N Y (x,) + - Ax1Dx (2)

where Y (xi) is the value of the function at the previous point.

Moreover, for the j-ro approximation interval

Y (xj.i) Y (xj-i.2) + AY (xj.i). Y (xjl2) Y (x | .i) + AY (xj-z).

(3)

where A Y (x, 1) is the increment of the second derivative of the function stored in the memory, negative values being written to the ROM in the additional code.

At the preparatory stage, the values of the second derivative Y (XJ.I) and Y (xj.z) for each approximation interval are calculated using the formulas;

Y (XM) Vi + V2j;

Y (xj, 2) Vi | -Y2j;

where YIJ is the value of the second derivative of the function to fulfill the boundary condition with respect to the first derivative of the function A Yf;

Y2j is the value of the second derivative of the function to fulfill the boundary condition A YJ.

The formulas for calculating the values of YIJ and Y2j are obtained on the basis of the integral dependencies between Y, Y, Y: A Y

YD

(Y, +) ax.

Oh

where A Yj YJ-H - Yj are the required increments I for the function and its first AYj. Yj + i - Yji derivative for the boundary conditions J – ro of the approximation interval.

The accumulating adders 4.9, 10 record the initial values Yi, .Yi, Y ,. In the older bits of counter 1, the address of the next cell in block 3 is recorded.

the memory in which the value of A is stored, and in the multiplier 6, the value of the integration step Dx.

The operation of the device is synchronized by the pulses of the outputs a, b with, d of the synchronization unit and is performed in two cycles. In the first cycle (by pulse a), the contents of the first adder Y (xji) / 2 through the first switch 5 are fed to the input of the first multiplier of multiplier 6, where it is multiplied with Ax. As a result, the output of the multiplier 6 forms the value Y (x | i) Ax / 2, which (by impulse b) goes through the second switch 7 to the buffer register 8 and to the second accumulating adder 9. where

is added to the contents of this adder, forming at its output the value HneY (xi) + Y (xjl) A x / 2. In the second cycle of operation of the device (pulse c) through the first switch 5, which is in this cycle

connects to the input of multiplier 6 the second accumulating adder 3, the value of Y (XI) + Y (xji) A x / 2 is fed to the multiplier 6, where the value of Oh is formed

t YM + Y (XJ) 1 x Dunn value

(pulse d) through the second switch 7, which in this cycle connects to the outputs of the multiplier 6, the third accumulating adder 10, arrives at the last, where

the value of the function is formed at the next point Y (XI + I) according to the formula (2) Simultaneously (also by pulse d), the outputs of the buffer register 8 through the second switch 7 are connected to the inputs of the second adder 9, at which the value of the first (derivative function Y (xi + i) according to (1) by repeatedly adding to Y (x,) + Y (xji) A x / 2 the contents of the buffer register 8

Y (X ||) Ax / 2. In the future, the device works in a similar way.

When filling 1 lower bits of counter 1, i.e. through p / 2 integration steps, upon the arrival of the pulse d from the synchronization unit 11 on the element 12, a control pulse is generated for the first accumulating adder 4. As a result, on the first accumulating

adder 4 generates the next value of the second derivative of the function Y (xp) according to (3), which remains unchanged for half of each approximation interval.

Claims (1)

DETAILED DESCRIPTION OF THE INVENTION A digital function generator comprising three accumulating adders, a first switch, a multiplier, a second increment memory block, a buffer register, and a synchronization block, the output of the second derivative increment memory block connected to the information input of the first accumulating adder, whose output is connected to the first the information input of the first switch, the output of which is connected to the input of the first multiplier of a multiplier, characterized in that, in order to reduce memory and increase t computations, a second switch, a counter, an address decoder and an AND element are entered into it; the clock input of the function’s digital generator is connected to the trigger input of the synchronization unit and the counter's count input, the high-order outputs of which are connected to the corresponding inputs of the address decoder, whose outputs are connected to the address inputs of the memory unit of the increments of the second derivative, the input of the integration step of the digital function generator is connected to the input of the second multiplier multiplier, - the output of which is connected to the first information input of the second switch, the first output of which is connected to the information input of the buffer register and the information input of the second accumulating adder, the outputs of the second accumulating adder and buffer register are connected to the second information inputs of the first and 10 second switches, respectively the second output of the second switch is connected to the information input of the third accumulating adder, the output of which is connected to the output of the digital generator ora 15 functions, the first and second control inputs of the first switch are connected respectively to the first clock of the clock outputs of the synchronization unit, the third and fourth clock outputs of the coyrang connection are respectively with the first and second control inputs of the second switch, the second clock output of the synchronization block is connected to the first input of the element And, the other inputs of which are connected to the corresponding outputs of the low-order bits of the counter, the output of the element I is connected to the synchronizing input of the first accumulating adder. YU h