SU1370737A1 - Generator of pulsed sequence - Google Patents

Abstract

The invention can be used in equipment for various purposes, for example, in radio measuring and radar systems. The aim of the invention is to improve the accuracy and stability of the linear law of changing pulse intervals and increase reliability. To achieve this goal, a decoder 5, a delay block 9, a multiplication unit 10, an adder 11, a trigger 12 are added to the pulse sequence generator. In addition, the device includes a generator I pulses, counters 2 and 3 pulses, a decoder 4, element I 6, driver 7, block 8 keys. A functional diagram of the multiplication unit 10 is provided in the specification. 2 Il.

Description

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The invention relates to a pulse technique and can be used in equipment for various purposes, in particular, in radio measuring and radar systems.

The aim of the invention is to improve the accuracy and stability of the linear law of variation of the interpulse intervals and increase reliability.

Fig. 1 shows a structural electrical circuit of a pulse sequence generator; Fig. 2 shows an example of execution of a multiplication unit.

The pulse sequence generator contains a pulse generator 1, counters 2 and 3 pulses, decoders 4 and 5, element 6, driver 7, key block 8, delay block 9, multiplication block 10, adder II and trigger 12, the output of generator 1 being connected through serially connected counter 2, decoder 4, element 6, driver 7, block 8 keys to the second input of counter 2, the output of the driver 7 is connected via serially connected blocks 9 and 10, counter 3 and decoder 5 to the trigger input 12 of the trigger 12, installation input whom connect with bus Start, the direct input of which is connected to the third input of the element 6, the second input of which is connected to the output of the generator 1, the inverse output of the trigger 12 is connected to the installation inputs of counters 2 and 3, the output of the counter 3 is connected through the adder 11 to the second inputs of the block 8, Multiplication unit 0 (FIG. 2) can be made in the form of a start-stop generator for a bundle, pulses with a number of pulses in a bundle equal to a given value cf of the linearity coefficient of the generated sequence, and contains the element And 13, a pulse counter 14 controlling Ger 15, the key generator 16 and the clock 17.

The device works as follows.

From the corresponding setters (not shown), block 10 and adder 11 are continuously supplied with the code values of the parameters o, and n, (where ct is the nonlinearity coefficient; n is the number of generator pulses I, expressing the initial value of the inter-pulse

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interval,) of the generated sequence, and on counter 3, the sign of the direction of change of the interval (+ or -). From generator 1, counting pulses are received at the counting input of counter 2, however, in the initial state, this counter with the zero signal of trigger zero 12 is kept in state S, which differs by one from the state detected by decoder 4. Counter 3, element I 6 is closed, since at its third input there is no enabling signal from the single output of the trigger 12.

The external trigger signal triggers 12 is transferred to the working position in which it is further located up to the point in time fixed by the decoder 5. Counters 2 and 3 are turned on, element 6 is opened. The first counting impulse of the generator 1 received after the start is counter 2; The effect of the decoder 4 is fixed, and the first pulse of the generated sequence is generated at the input of the element 6. At the end of this pulse, a census pulse appears at the output of the generator 7, which into the counter 2 through the key block 8 records with the code of the number n in the adder 11 (the counter 3 continues to remain in the zero state, since the input of the block 10 not a single impulse has yet been received). The shaper 7 provides a stable record of the number from the adder 11 to all cells of the counter 2, regardless of the duration of the device's every-pulse. Since counter 2 is inverse, after n, the counting cycle will again return to the state Aixed by decoder 5, and the output of element 6 will generate a second pulse of the generated sequence, as required by the specified format of the generated sequence.

In the interval between the first and second pulses, but after the census of the number n is completed in counter 2 (the corresponding delay is provided by block 9), a trigger pulse will be sent to the input of the multiplication unit 10, which forms the increment value of the next pulse interval relative to the previous one for subsequent recording in the counter 2. In the block

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10 this HNmynbc triggers trigger 15, and through element I 13, generator 10 pulses start to flow to counter 3 and the generator 3 starts to flow to the counter. Since before the start of block IO, the 14 I14 pulses into the inverse counter through the key 16 were recorded with the stop signal I the number code, then after the block 1 gives a packet of pulses, the counter 14 zeroes and resets the trigger 15, after which the block 10 is ready for issuing the next next packet of pulses. So

Thus, the output pulse of the block is 15 rm by the input of the second pulse counter, the first input of which is connected

As delay 9 increases, the counting state of the 3 pulses and the sum at the output of the adder 11 are about units in accordance with the specified format of the generated sequence. As a result, after the end of the sequence of the next iM17 pulses of the generated sequence and the entry in counter 2 of the code of the value of the next interpulse

with the second input element And, characterized in that, in order to improve the accuracy and stability of the 20 linear law of changing pulse intervals and increase reliability, a second decoder, delay unit, multiplication unit, adder and trigger embedding

The interval at the output of the adder 11 is a form-25 whose input is connected to the output. The code for the value of the next next pulse interval is inertia. The code of the second pulse interval is formed in the adder 11 in the first pulse interval, and is rewritten into counter 2 after the end of the second pulse. When generating a sequence with decreasing intervals, the pulse counter 3 is turned on for the subtraction, and the sums at the output of the block I1 are reduced by one with each clock cycle.

The process continues until counter 3 transitions to a state that exceeds the specified value.

Hj and fixed by the decoder 5, after which the trigger 13 is zeroed and the device is ready for the next start.

Claims (1)

Invention Formula The pulse sequence generator containing the first pulse counter and a pulse generator connected in series, the second pulse counter, the first decoder, the AND element, the driver and the key block, the output of which is connected to the second input of the AND element, characterized in that, in order to improve the accuracy and stability of the linear law of changing pulse intervals and increasing reliability; a second decoder, a delay unit, a multiplication unit, an adder and a trigger, which embed the input of which is connected to the output of the second decoder, the input of which is connected to the output of the first pulse counter and to the input of the adder, the output of which is connected to the second input of the key block, the first input of which through the series-connected delay blocks and the multiplication unit connected to the counter input of the first pulse counter, zeroed the input input of which is connected to the installation input of the second pulse counter and with the inverse output of the trigger, the direct output of which is connected to the third input of the element I, the installation input of the trigger connection Yuchen to the bus Start device. FIG. 2