SU1483431A1 - Modulo 9 check and program control unit - Google Patents

Abstract

The invention relates to automation and computing and can be used in numerical control systems. The purpose of the invention is to increase speed. The control unit modulo 9 for software control consists of a block 1 of program input, block 2 of working out coordinate movements and a control counter 3, additional blocks: two comparison blocks 4, 5, two adders 6, 7, two registers 8.9, block 10 code element 11. 11 Il.

Description

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FIG. one

The invention relates to automation and computing and can be used in numerical control systems.

The purpose of the invention is to increase the speed of action.

FIG. 1 shows a block diagram of the device; in fig. 2 - to explain the operation of the code generation unit.

The control unit modulo 9 for program control contains a block 1 for entering programs, a block 2 for working out coordinate movements, a check counter 3, first 4 and second 5 comparison blocks, first 6 and second 7 adders, second 8 and first 9 registers, code generation block 10 and element and 11.

Block 10 forms the additional code of the number 9, which corresponds to the code of the number 7.

The adder 7 can be performed on the element K155IMZ. In this case, one of the inputs of the high-order bit is connected to zero, and the three lower-order bits through three repeaters with the output of block 5. Functionally, these repeaters are shaper 10 codes.

The algorithm of the device operation is based on the properties of a decimal number to have the same remainder of the division by nine as the total number, and the sum of the decimal components that make it up.

At the initial moment, register 8 is in the zero state, information at the output of block 1 is missing. Therefore, a zero code is set at the output of the adder 6, while a zero potential is set at the output of the block, since O-9. A zero code is set at the output of block 10, since block 10 forms the code for the number 7 (0111) only if the code at the output of the adder 6 is greater or equal to number 9.

The device works as follows.

Before starting operation, registers 8 and 9 and counter 3 are set to the zero state (there are zero codes at the outputs). Information about the magnitude of movement along the coordinate in the form of a serial-parallel binary-decimal code comes from the output of the program input block 1 to the input of the block 2 for working coordinate movements (interpolator). The information converted by unit 2 in the form of a unitary code is fed to the input of the control counter 3. When entering information from the unit 2 to working out coordinate displacements, the code of each decimal digit of the displacement amount simultaneously arrives at the first input of the adder 6, and from its output - to the second input of the adder 7 from the output of which the code of the number arrives at

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blew 9 the numerical part of the coordinate movement. At the same time, this number is recorded in the intermediate memory of block 2. When the address LF appears (the end of the frame. Program input is interrupted.

The signal of the end of testing the previous frame overwrites the number from register 8 to register 9 and at the same time starts the input of the next frame of block 1 and overwrites the information from the intermediate into the working memory of block 2. Block 2 starts processing this movement. The cycle is repeated. Writing information to the register

9 is generated on the falling edge of the write pulse.

From the output of register 8, the code of the number is fed to the input of the adder 6, adding to the value of the next decimal digit entered in block 2. The sum of these numbers from the output of the adder 6 is fed to the second input of the comparison block 5, at the first input of which the code is set 9. If you exceed the sum of the numbers at the input of the adder 6 of the number 9, a single potential is established at the output of the comparison block 5, which includes the block

10 forming code. At the output of the block 10, an additional code of the number 9 is formed. This code goes to the first input of the adder 7. Thus, the output of the adder 7 forms the difference between the number arriving at its second input and the number 9. Consequently, when entered into block 2 practicing the coordinate displacements of a certain decimal number in register 8 will be a recorded number equal to modulo 9 of the sum of the digits constituting this decimal number ..

Thus, when entering the number 1234567 in block 2, register 2 will contain the recorded number 1. Out of register 8, the signal rewrites the register 9 using the end of the previous frame's signal.

The information from the output of block 2 as a unitary code is fed to the input of the control counter 3. Since the division factor of counter 3 is 9, after the unit 2 has completed the specified movement, the counter 3 remains a number equal to the remainder of the division of the number of pulses from the output of block 2 on 9 i.e. in example 1 (1234567: 9 137174 and residue 1).

The numbers from the outputs of counter 3 and register 9 arrive at block 4 of the comparison. If these numbers are not equal, which indicates the incorrect working out of a given movement, a unit potential is established at the output of block 4. At the end of the processing of each frame, block 2 generates a pulse. The end of development of the frame, which, the turn of register 8, where it is recorded by signal to the input of the element 11, forms

the synchronizing pulse (CI) accompanying each decimal digit of the number entered in block 2. When a program is entered into register 8, a record is written

its output signal "Failure in case of improper processing of a given movement. This device can be included with any software device.

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blew 9 the numerical part of the coordinate movement. At the same time, this number is recorded in the intermediate memory of block 2. When the address LF appears (the end of the frame. Program input is interrupted.

The signal of the end of testing the previous frame overwrites the number from register 8 to register 9 and at the same time starts the input of the next frame of block 1 and overwrites the information from the intermediate into the working memory of block 2. Block 2 starts processing this movement. The cycle is repeated. Writing information to the register

9 is generated on the falling edge of the write pulse.

From the output of register 8, the code of the number is fed to the input of the adder 6, adding to the value of the next decimal digit entered in block 2. The sum of these numbers from the output of the adder 6 is fed to the second input of the comparison block 5, at the first input of which the code is set 9. If you exceed the sum of the numbers at the input of the adder 6 of the number 9, a single potential is established at the output of the comparison block 5, which includes the block

10 forming code. At the output of the block 10, an additional code of the number 9 is formed. This code goes to the first input of the adder 7. Thus, the output of the adder 7 forms the difference between the number arriving at its second input and the number 9. Consequently, when entered into block 2 practicing the coordinate displacements of a certain decimal number in register 8 will be a recorded number equal to modulo 9 of the sum of the digits constituting this decimal number ..

Thus, when entering the number 1234567 in block 2, register 2 will contain the recorded number 1. Out of register 8, the signal rewrites the register 9 using the end of the previous frame's signal.

The information from the output of block 2 as a unitary code is fed to the input of the control counter 3. Since the division factor of counter 3 is 9, after the unit 2 has completed the specified movement, the counter 3 remains a number equal to the remainder of the division of the number of pulses from the output of block 2, by 9 i.e. in example 1 (1234567: 9 137174 and residue 1).

The numbers from the outputs of counter 3 and register 9 arrive at block 4 of the comparison. If these numbers are not equal, which indicates the incorrect working out of a given movement, a unit potential is established at the output of block 4. At the end of the processing of each frame, block 2 generates a pulse “The end of testing of the frame, which, entering the input of the element 11, forms

its output signal "Failure in case of improper processing of a given movement. This device can be included with any software device.

control, containing the input block and the unit of working coordinate movements (interpolator).

The proposed device allows to maximize the speed of inputting information. Since the time taken to complete a frame must be longer than the time to enter information of the next frame, increasing the input speed allows us to increase the speed of the program, which is important when checking control programs in an accelerated mode. This allows for more efficient use of the data entry channel, freeing it to transmit other data.

Claims (1)

Invention Formula A control unit modulo 9 for software control, containing a program input unit, the output of which is connected to the input of a coordinate movement testing unit connected by a first output to the input of a control counter, characterized in that, in order to improve the speed of the device, the first and the second comparison block, the first and second adders, the first and second registers, the code generation unit and the element P., the first input of the first comparison block is connected to the output of the control counter, the second input is connected to the output the first register, and the output of the first block of comparison — with the first BXJ-house of the element I, the second input of which is connected to the second output of the block of working out coordinate movements and the recording input of the first register, whose information input is connected to the second input of the first adder and the output of the second register, input the recording of which is connected to the first input of the monitoring device modulo 9, and the information input to the output of the second adder, the first input of which is connected to the output of the code generation unit, the input of which is connected to the output of the second block The first input is connected to the second input of the monitoring device modulo 9, and the second input is connected to the input of the second adder and the output of the first adder, the first input of which is connected to the output of the program input block.