SU714357A1 - Programme-logic regulator - Google Patents

Description

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The invention relates to automatic systems for controlling and controlling equipment operation.

A software logic controller is known that perceives information from two-position sensors and, based on the analysis of this information, generates control signals for actuators 1j. The basic components of the controller include: a program memory block, an information input block, and a control signal output block. The input and output units contain signal conversion and switching devices.

The closest in technical dryness to the proposed invention is a program-logic controller, which contains a clock pulse generator, a program memory block consisting of a command counter, a memory block, a command register and a conditional jump command block, a logical operation block, and also input and output units, each consisting of

the input (output) switch and the matching and normalization blocks of the input and output signals, respectively, p. The clock generator is connected to the clock inputs of the command counter and other blocks entering the device. The command counter p. Is connected to the storage device whose output is connected to the command register. Register of commands in turn. connected to the input switch, the input switch, the logical operating unit and the first input of the device of the conditional jump command. The input switch is connected to the input matching and normalizing device and the logical operating unit to the output. The output switch is connected to a device for coordinating and normalizing the information output unit. The output of the logic operation unit is connected to the information input of the device for matching and normalizing the information output unit and to the second input of the conditional switch device, the output of which is connected to the program counter of the program memory unit.

A disadvantage of the known controller is the low speed and large storage capacity.

The purpose of the invention is to increase the efficiency of the program-logical regulator and reduce the required memory size of the storage device.

The goal is achieved by the program logic controller. The serial clock generator, command counter, memory block, command register and command instruction block, the output of the coordinator is connected to the second command counter, and the second input is connected to the optical output block and the first input of the output matching unit. signal normalization, connected by the second input through the output switch with the second output of the command register and with the first ahrd of the current switch, the second input of which is connected to the output of the input matching and normalizing unit, and the third output of the command register contains the convolution unit the information of the first pass is connected to the output of the turntable, output to the second pass of the logical operating unit, and the second and third passages to the fourth and right I will give the command register, respectively, and the fact that the information block convolution unit contains the OR-exclusive elements grouped in series, the OR elements group and the AND element whose output is connected to the block output, and the second element passes OR, the first and second element passes OR exclusive connected to the third, second and first unit, respectively,

Fig. 1 shows a block diagram of a program-logic controller, and Fig. 2 shows a diagram of a convolution block.

A program-logic controller includes a clock pulse generator IK command counter 2, memorizing block 3, command register 4, command block for comavd 5, switching switch 6, switching block II of signal normalization 7, block of convolution of information 8, logical operator ONE (th unit Oh, the complete switch 10, the OUTPUT of the harmonization unit and the normalized signal); 11, the elements ORI1CO (12, the elements OR 13 and

And 14,

Program-logic controller works as follows. Generator 1 generates a sequence of pulse signals synchronizing

operation of blocks of a program-logic controller. In counter 2, the number of the next command to be executed is generated. The command with the specified number is extracted from block 3 and its code

enters the register 4. The command code contains the operational address part, the first additional group of bits and the second additional group of bits. The operation code from register 4 is entered into block 9, and the address code is sent to switches b and 1О.

If the command retrieved from block 3 is an input command, then switch 6 connects to block 8 that sensor group whose number is specified in the address part of the command. At the same time, on the second pass of block 8, the contents of the first group of additional bits of the command code are fed, and to the third pass, the contents of the second group of additional bits of the command code. As a result, either the logical 1 signal appears at the output of block 8, if the combination of the same X signals coincides with the specified one, or if the signal is logical O otherwise.

When the condition of forming the output control signal is fulfilled in block 9, a control signal is generated, which is fed to the actuator through block 11.

The introduction of a new element - a block of information convolution allows to increase the speed of the program-logic controller

Claims (2)

1. A program-logic controller, containing a serially connected clock, a command counter, a storage unit, a command register and a command for setting commands, the output of which is connected to the second input of the command counter, and the second input to the output of the logical operating unit and the first input output signal matching unit for normalization of signals, connected by the second input through the output switch with the second output of the command- register, and with the first input of the input switch, the second input of which is connected to the output of the input signal matching and signaling unit, and the third output of the command register is connected to the first input of the logic operating unit, characterized in that, in order to improve the speed and simplify the device, it contains the information convolution unit, the first input of which is connected to the output of the input switch, vcode to the second input of the logical operating unit, and the second and third inputs to the fourth and fifth outputs of the command register, respectively. 2. A program-logic controller, characterized in that the information convolution unit contains the OR-exclusive group of elements in series, the group of OR elements and the AND element whose output is connected to the output of the block, and the second inputs of the OR elements, the first and second inputs OR-exclusive elements are connected to the third, second, and .first inputs of the block, respectively. Sources of information taken into account during the examination 1. Patent of Germany No. 2021187, В 19 / О2, 197О. cl 2. US patent No. 3832696, cl. 340-172.5, 1975 (prototype). lg / ffm ifOMny1tatora6