SU576658A1 - Device for multiplying periodic pulse repetition frequency - Google Patents

Description

nn, as is known, the frequency is determined by the inverse of the pulse following period.

This goal is achieved by the fact that in a device for multiplying the frequency of following periodic pulses, containing an input driver, a control unit, a frequency divider, a key, a L1Broat unit, consisting of two counters, is stored and its register, transfer unit, and OR and AND elements; a correction unit consisting of a transfer unit, a counter, elements I and a one-shot, the bit outputs of the frequency divider are connected to the inputs of the transfer unit, a correction unit whose control input is connected to the second output of the control unit, the output of the first element I of the correction unit is connected to the input of the counter of the correction unit and to the second control input of the key, the first input to the output of the one-vibrator, and the second input to the output of the second element And the correction unit.

The drawing shows the structural electrical circuit of the device for multiplying the pulse frequency.

The device contains an input driver 1, a control unit 2, a frequency generator 3, a frequency divider 4, a correction unit 5, a key 6, a multiplication unit 7.

Block 5 contains the block 8 of the transfer, the counter 9, the elements And 10 And And, the one-shot 12.

Block 7 contains the first counter 13, the storage register 14, block 15 of the transfer, the second counter 16, the element And 17, the element OR 18.

Divider 4 and counter 13 are totalizing binary counters, and counter 9 and setter 16 are binary subtractive counters.

The device works as follows.

The pulses from the generator 3 are fed to the input of the divider 4, the division factor (co-counting) of which is equal to the specified multiplication coefficient / C.

Pulses from the output of divider 4, frequency

following which is equal, arrive at

TO

the input of the counter 13. For the period Tx of the input periodic signal, which varies continuously with the frequency fx, which is allocated by the input driver I, to the input of the divider 4 will go (iTx pulses.

In counter 13, the number of pulses N ow N, equal to the integer part of the division, will be fixed, and in

BUT

the divider 4 will fix the remainder of the pulses equal to. At the end of period 7, the signal from the control unit 2 first rewrites the received values of the AL codes / from divider 4 through block 8 to counter 9 and from counter 13 to memory register 14, then with a delay of - second sig / 0

control unit 2 through element

or 18 rewrites the code from the memory register 14 to the counter 16 and resets the divider 4 and the counter 13 to zero, preparing them for a new filling in the next non-period TX.

The output pulses of the multiplication device appear each time, as soon as the counter 16 goes into the zero state, to the subtractive input of which, via the key 6, pulses are sent from the generator 3. With each output pulse of the device, the code V is copied from the storage register 14 through block 15 to the counter 16 and the subtraction process is repeated.

Obviously, the output pulses will be spaced uniformly only at N multiple of / C, i.e. at A ,.

When block 5 performs correction of the time distribution of the output pulses within the period Tx. Correction is as follows.

When, the value of which is in the counter 9, at the output of the element 10, connected to the first input of the element 11, there is a unit level. Each output pulse of the multiplying device triggers a one-shot 12, which produces a single pulse of TQ duration to the second input of element 11. In this case, the output of element 11 is a signal that closes key 6 for time Go, i.e. from a sequence of impuls / o subtracts one pulse, which causes the next output pulse of the multiplication device to appear later by time TQ. In addition, the same output signal of AND 11 is applied to the subtracting input of counter 9 and one is subtracted from A.V. During TX, this operation is performed A / V times

after the first output pulse of the multiplier from the beginning of the period Tx, until counter 9 is set to zero. In this case, the output of the element And 10 will be set to zero and the output of the element And 11

the signal that closes the key 6, will not, regardless of the operation of the one-shot 12.

Thus, the timing of the output pulses of the multiplying device after the first is corrected. It is obvious that the maximum absolute error of the position of any of the K output pulses of the reduced device multiplies the frequency of the periodic pulses following the period Tx without taking into account the discontinuity of converting the period TX to N does not exceed the value TQ.

Claims (2)

1. USSR author's certificate No. 357668, cl. N OZK 5/01, 1971. 2.Smelkov V.V. Digital measuring equipment of infra-low frequencies, M., “Energy, 1975, p. 42