SU450138A1 - Fault finding device - Google Patents

Description

one

The invention relates to the field of automation and computing and can be applied to troubleshoot electronic circuits of control systems and computing.

It is known a troubleshooting device comprising a switching unit, the first input of which is connected to the output of the reference circuit, the second input to the output of the checked circuit connected to the first input of the first mismatch circuit, the second input of which is connected to the first output of the switching unit, and the output through the first strobe key and the first trigger connected in series to the input of the first indication circuit. Other outputs of the switching unit are connected to the second and third display circuits and to the inputs of the second mismatch circuit connected to the fourth display circuit and through the OR circuit to the first input of the second gate key whose output is connected to the input of the third display circuit, and the second input the third strobe key - with the release of the second trigger.

However, this device has low reliability when troubleshooting.

The proposed device is characterized in that it contains a unit for evaluating the intensity of failures connected by one input to the output of the second gate key, and output

to the input of the second trigger, and a series-connected adjustable delay circuit and a single pulse generator, the output of which is connected to the second input of the failure rate estimator and to the inputs of the first and third gating keys.

This makes it possible to increase the reliability of the device.

The drawing shows the block diagram of the device.

The device contains a reference circuit 1, a switching unit 2, a verifiable circuit 3, a first mismatch circuit 4, a second mismatch circuit 5, an OR 6 circuit, a gate driver 7, a first gate key 8, a second gate key 9, a third gate key 10, the first trigger And, the second trigger 12, the display circuit 13-17, the unit for assessing the intensity of failures 18, the single pulse generator 19 and the adjustable delay circuit 20.

The device works as follows.

On the switching panel of switching unit 2, switching is performed, which ensures the implementation of the reference circuit 1 of the required type and the connection of the input and output terminals of the tested circuit 3 to the corresponding circuits of the device. The required tolerance values are set for all three predictive signal parameters: amplitude — by setting threshold levels in the mismatch schemes 4 and 5; phase - by setting the start delay time of the generator of single pulses 19 by adjustable delay circuit 20; the duration is set by setting the duration of the strobe pulse generated by the single pulse generator 19. The gate driver input 7 is connected either to any of the inputs of the circuit being tested, or, for example, to the output of the micro pulse pulse generator, etc. In the intensity estimation unit Failures 18 have counters, of which the first counts the number of strobe pulses, i.e. the total number of measurements, and the second the number of mismatch signals from the output of the strobe key. In any case, the ratio of meter readings determines the intensity of incomparisons — failures in predicting faults.

The output signals of the implemented set of the reference circuit 1 and the circuit 2 being tested are fed to the second mismatch circuit 5. A difference signal for each channel is fed to this mismatch circuit, which is triggered when the signal exceeds the threshold level. The mismatch signal that occurred in this case goes through the "OR 6" circuit to the input of the second gate key 9 and passes through it only if it coincides in time with the gate pulse from the third gate key 10. The gate mismatch signal goes to the inputs of the display control circuit 13-16 input and output signals, implemented on the set of the reference circuit I and the tested circuit 2.

By the overflow signal with the output of the failure rate estimator 18, the second trigger 11 is set to one state, locking the third gate key 9 with zero output and locking the contents of all the registers at the time of the error signal. Analysis of the contents of the bits of all registers of display circuits 13-17 allows unambiguously to determine a clear or hidden fault and its location in

checked circuit 3 or in the device itself. The following circuit operates similarly: the first mismatch circuit 4 — the first gate key 8 — the first trigger 11 — the indication circuit 17 when the fault is localized in the circuit 3 being checked.

Subject invention

A troubleshooting device containing a switching unit, the first input of which is connected to the output of the reference circuit, the second input to the output of the checked circuit connected to the first input of the first mismatch circuit, the second input of which is connected

to the first output of the switching unit, and the output through a serially connected first gate key and the first trigger to the input of the first display circuit, the other outputs of the switching unit are connected

with the second and third indication circuits and with the inputs of the second mismatch circuit connected by the output to the fourth indication circuit and through the OR circuit to the first input of the second gate key, the output of which

connected to the input of the third display circuit, and the second input through the third gate key to the output of the second trigger, characterized in that, in order to increase the reliability of the device, it contains a failure rate evaluation unit connected by one input to the output of the second gate key, and output to the input of the second trigger, and a series-connected adjustable delay circuit and a single pulse generator, the output of which is connected to the second input of the failure rate estimator and to the inputs of the first and third gating x keys.