SU381172A1 - BINARY DECIMAL COUNTER - Google Patents

Description

one

There are known binary-decimal counters with parallel connection of trigger cells, in which the first trigger acts as a divisor by two, and the other three triggers form a pyric counter, built according to the logic of Möbius strip with the exception of one of its six states.

The disadvantage of these counters is the significant energy load on the output of the first trigger, reducing the reliability and speed of the decade.

The proposed binary-decimal counter differs from the known ones in order to increase reliability and speed due to the symmetric distribution of the load of the trigger cells, the potential key inputs on the zero and single inputs of the second trigger are connected to the same outputs of the fourth trigger, the potential key inputs on the similar inputs the third and fourth flip-flops are connected to opposite outputs of the second and third flip-flops, respectively, and the pulse inputs of the keys at the zero and single inputs to ex flops are respectively connected to the outputs of one and zero of the first trigger.

The functional diagram of the binary-decimal g; tet is shown in the drawing.

The counter contains binary trigger cells / -4 and two-input key circuits 5-12 on the separate inputs of the triggers.

The first trigger is started at the counting input, for which the keys 5 and 6 are supplied with control potentials from the outputs of the same trigger. Triggers 2-4 are triggered by a push-pull pattern with signals from trigger outputs /, which run on buses 13 and 14, respectively, to the pulse inputs of keys 7, 9, 11 and 8, 10, 12. The connection of the control inputs of these keys 11 to the outputs of the corresponding trigger points drawing.

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Let us assume for definiteness that the zero states of the triggers correspond to a high negative potential on the right-handed outputs and a low level on the left; the keys are locked

when applying to their control inputs of a high negative potential and open - prn nodache low; triggers are flashing positive impulses on their inputs; irix. Positive voltage drops

The trigger's outputs / pass through the opening of the keys to the inputs of the corresponding triggers, transferring the latter to opposite states, or confirming the previous ones. Negative drops in the pattern through the keys are not key.

The logic of the binary-decimal counter operation is explained in the table, where the numbers O and 1 indicate the states of the corresponding triggers that they run when calculating the number of pulses from 1 to 10.

As can be seen from the table, the first trigger performs division by two, and the other three work according to the logic of the Möbius strip using all six of its states: 000, 001, 011, 111, 110, 100. From the point of view of count rate, i.e. The maximum delay of the output signal relative to the input signal, the proposed binary-decimal counter, is similar to the known, using five of six states of the Möbius strip and two-input keys on separate inputs of the trigger cells. The maximum delay for counters of these types is equal to double the duration of the trigger front.

An additional advantage of the proposed counter is the ability to remove the output signals simultaneously from three flip-flops (2-4). The signals at their inputs are shifted in phase relative to each other by a clock step and have the form of a meander, which simplifies the setting of the counter.

Subject invention

A binary-decimal counter containing four triggers with two-input keys on their separate inputs, characterized in that, in order to increase speed and reliability by equal distribution of the load on the triggers, the potential inputs of the keys on the zero and single inputs of the second trigger are connected to the same outputs the fourth trigger, the potential inputs of the keys on the analogous inputs of the third and fourth triggers are connected to opposite outputs of the second and third triggers, respectively, and e keys inputs at zero and the unit of all inputs of flip-flops are respectively connected to the unit and the zero outputs of the first flip-flop.