SU1711090A1 - Digital phase meter - Google Patents

Abstract

The invention relates to a radio metering technique and can be used to measure the phase angle between two periodic electrical signals. The invention solves the problem of increasing the potential resolution of the measurement of the phase difference. The problem is solved by introducing a reference signal pulse generator into the digital phase meter, 2 (n + 1) triggers, a third key element and two OR elements. The phase meter also contains an input signal switch, a pulse shaper, two key elements, and a character selection trigger that controls trigger, quantizing delay line, consisting of n -and OR elements, l delay elements and an additional delay element, a quantizing pulse counter, two delay elements, a decoder and a register ,, 4 or about S (L

Description

The invention relates to radio metering technology and can be used to measure the phase angle between two periodic electrical signals.

A digital phase meter is known that contains a first driver consisting of a reference signal meander and a positive and negative zero driver of a reference signal shaper, a positive zero converter of a signal under study, a clock counter, a trigger for selecting a sign, three elements And, to the inputs the first of which is connected to a generator of coherent quantizing pulses and a control trigger, and the output is connected to the subtractive input of the reversing one.

the counter, the switch of the reference and the investigated signals, the decoder, the adder, the fourth element And the first and second registers and the trigger shaper pedestals delay, while the inputs of the drivers are connected through the switch to the sources of the reference jn of the signal under study, the output of the shapers of the zero zero transitions of the reference signal connected to the input Resetting the control trigger, to one of the inputs of the second element AND and to the reset input of the trigger, the driver of the delay pedestals and through the delay element to the input Record. rsivnogo counter and the counting input of the clock pulse counter which outputs ,, through decoder connected to inputs of the first term

WITH

the accumulator and the second input of the second element I, the inputs Reset the first register and the counter of clock pulses are connected to the (n + 1) th output of the decoder, the setting inputs of the first register are connected to the outputs of the adder, also connected to the installation inputs of the reversible counter, the outputs of the first register are connected to the second installation inputs of the second register and the outputs of the second term of the adder, the pulse output of the reversible counter is connected to the starting input of the trigger-former of the pedestal - 15 delay steel, the output of which is It is connected to one of the inputs of the third element I, the output of which is connected to the input. Entering the first register, and the second input is connected to the output of the pulse shaper of positive zero transitions of the signal under study and one of the inputs of the fourth element I, the second input of which is connected to the inverse output. Forwarding the meander of the reference signal, and the output to the start input of the trigger of the selection of the sign, the direct output of the meandering generator of the reference signal through the pulse shaper of positive zero transitions is connected to the start input of the control trigger and directly to the control input of the coherent quantizing pulse generator, the output of the second element, And through the delay element connected to the reset input of the character selection trigger and directly to the input of the second register, the output of the character selection trigger of the sub key the control input of the switch and to the setup input of the second register j whose outputs are the output of the device

The disadvantage of the phase meter is a hard link between accuracy and speed. 0 At the same time, the accuracy increase, all other things being equal; The conditions are achieved by reducing the speed, since the result of the measured, -Q phase shift angle between the reference and test signals is read only at the end of the measuring cycle, which includes n periods of the reference signal, where n is the number, the bits per sample phases.

The closest to the present invention is a digital phase meter, with an observant, shaper of the reference and test signal, whose inputs are connected to the corresponding outputs of the input switch, the first output of the signal conditioners are connected via a key element to the input of the character selection trigger, the output of which is connected to the control input of the switch and with a sign informational output of the phase meter, the second output of the reference signal conditioner through the delay element and the zero-resolution enable pulse conditioner are connected to the control input of the quantizing pulse counter and to the first input of the control trigger, the second input of which through the second delay element is connected to the output of the first key element, and the output is connected to the first input of the second key element whose second input through the inverter the reference signal is also connected

to the second output of the reference signal generator, a quantizing line consisting of n + 1 elements OR, between the first output of each and the first input of the subsequent one, n quantizing delay elements, and an additional delay element connected between the second input of the first element OR and one output of the following OR elements, the first input of the first OR element and the second inputs of all the other OR elements of the quantizing line are connected to the first output of the reference signal former, the second outputs of all the OR elements are Yucheny to the inputs of the first register, the first input of which is connected to the counting input of the quantizing pulse counter, whose information outputs through the second register, used to record an integer number of periods of quantizing pulses, are connected to the information inputs of the adder-decoder, to the second information inputs of which the information outputs of the first register, the control inputs of both registers are connected to the output of the pulse former of the signal under investigation, the control input of the adder-decoder is connected to Exit second key member, and its data outputs are the outputs of phase; meter

The disadvantage of the phase meter is incomplete use of the possibilities

quantizing line in terms of ensuring the resolution of measurements of phase difference due to the following reasons:

The quantizing pulse counter at the beginning of each cycle is zeroed out, which is carried out by the signal from the inverse output of the meander shaper. The reference signal through the delay element and the shunt resolution pulse shaper. The zero-resolution resolution pulse must have a duration sufficient to zero the counter and at the same time must be delayed, with respect to the front of the reference meander for less than a quantum period. The quantum duration mainly determines the phase measurement resolution taking into account that the delay value the signal always has some (spread, and the duration of the zero-resolution resolution pulse must have a definite, divided final value, it cannot be; reduce the quantum period to less than a certain amount, which limits the resolution bnost measurements

The quantum fractions are counted by recording the output signals with. of the OR elements of the quantizing delay line, that is, by fixing the levels of logical zeros and ones. With a short period of a quantizing signal (high measurement resolution) the duration of the pulse fronts becomes comparable with the pulse duration, and there is an inaccuracy in determining the logic level at the time of reading the code formed by the signal levels at the outputs of the quantizing line.

The purpose of the invention is to increase the potential resolution of the measurement of the phase difference. The goal is achieved by the fact that, in a digital phase meter, containing a switch, the input signals are connected to the sources of the reference and test signals through the meanders, the outputs of which are directly and the second output. through the pulse shaper of the signal under study, they are connected to the inputs of the key element, the output of which is connected to the input of the trigger of the selection of the sign, the output of which is connected to the input of the switch and to the sign information output of the phase meter that controls the second key input element, a quantizing delay line consisting of n + 1 OR elements, between the first output of each of which and the first input of the subsequent one, are included n elements of the delay, and an additional delay element included Between the second input of the first element OR and the output of one of the following, the first input of the first element OR and the second inputs of all the others are combined and are the input of a quantizing delay line as well as a quantizing pulse counter, two delay elements, a decoder and a register; signal, 2 (n + 1) triggers, the third key element and 2 elements OR, while the outputs of the OR elements of the quantizing delay line are connected via triggers to the first information inputs of the decoder, the second information the inputs of which are connected to the outputs of the counter and the output to the register, the output of which is the output of the phase meter, the control input connection the output of the second key element, the second input of which through the first delay element is connected to the output of the pulse former of the signal under study the key element is connected to the reset inputs of the first additional element OR triggers and the first input of the second additional element OR, the second input of which is connected to one and From the outputs of the first element OR a quantizing delay line, and the output is connected to the counter input, the control input of which is connected to the output of the control trigger, also connected to the input of the quantizing delay line and the second input of the third key element, the inputs connected to the outputs of the pulse former and the reference pulse generator signals, the last one of which is connected to the second output of the input signals switch, in addition, other outputs of the additional elements OR are connected to the output of the first key element

In a well-known phase meter, the corresponding code is obtained according to the output signal levels from the quantizing delay line, and in latency, to the parity or oddness of the coder.

The number of fronts of quanta that pass through the direct and inverse outputs of the same line. For this, the register associated with the line outputs is replaced with dynamic triggers, the pulse shaper of the signal under investigation controls the quantizing delay line through a special trigger. In re

As a result, there was no need to reset the counter into the calf of the first quantum, i.e., the potential resolution of the phase meter increased.

Fig „1 shows the functional diagram of the digital phase meter; in fig. 2-4 - time diagrams that show his work.

The digital phase meter contains a switch 1 input signals connected to the sources of the reference and test signals through shapers 2, 3 meanders of the reference and test signals, the outputs of switch 1 are directly one, and the second through the driver 4 pulses of the test signal are connected to the inputs of the key element.5, the output of which connected to the input of the trigger 6 for the selection of the sign, the output of which is connected to the input of the switch 1 and to the sign-in inormal output of the phase meter, controlling the trigger 7, the output of which is connected to one of the second key element 8, the quantizing delay line 9, consisting of n + 1 OR-NOT / OR 10 elements, between the first output of each of which and the first input of the subsequent one, are included n delay elements 11, and an additional delay element 12 connected between the second the input of the first element OR 10 and the output of one of the subsequent elements OR 10 (OR 10), the first input of the first element OR 10 c and the second inputs of all the others are combined and are the input of the quantizing delay line 9, the counter 13 of quantizing pulses, two delay elements 14 and 15 decipher rator 16 and register 17, yurmirovator 19 pulses of the reference signal, 2 (n + 1 flip-flops 19, the third key element 20 and the elements OR 21, 22, while the outputs of the elements OR-NOT / OR 10 quantizing line 9. delay through the triggers 19 are connected to the first information inputs of the decoder 16 whose second information inputs

0

five

0

connected to the outputs of the counter 13, and the output to the register 17, the output of which is the output of the phase meter, the control input connected to the output of the second key element 8, the second input of which through the first delay element 14 is connected to the output of the driver 4 pulses of the signal under study, which is also through the second delay element 15 and the third key element 20 is connected to the reset inputs of the trigger 19 (dynamic) via the element OR 22 and the first input of the second additional element OR 21, the second input of which is connected to one of the output in the first OR-NOT / OR 10 element, the quantizing delay line 9, and the output is connected to the input of the counter 13, the control input of which is connected to the output of the control trigger 7 (if necessary to be matched via an inverter 23) connected also to the input of the quantizing 5 lines 9. delay and the second input of the third key element OR 20, the inputs of the trigger 7 are connected to the outputs of the formers 4 and 18 of the test and reference signals, the last of which is connected to the second output of the switch 1 of the input signals, in addition, other inputs OR 21 and 22 are connected to output a key element

5 Digital phase meter works as follows.

Sinusoidal signals with input Bx 1 and Bx 2 are converted into Shaper 2, 3 into square wave (point a and a) and are fed to the input of switch 1. The following options of the switch state and the ratio of signal signals are possible.

Option 1 (Fig „2). Signal to input 2

45 lags behind the signal on Bx.1 by an amount smaller than 180, and the switch connects a4 to b, and to 6Z (the sign of the phase difference -). Signal differences between logical levels

50 zero. (O) and logical units.

(1) Drummers trigger 4 and 18 pulses, which form pulses at their outputs into and into. The appearance of a pulse is equivalent to the appearance

55 logical units. For definiteness in FIG. 1-3, a higher signal level is taken as a logical unit, and a negative differential is fixed with a level lock (logical

0

 5 40

1 on O). At the moment t, a pulse appears at the point vg, overturning the trigger 7 "At the point r a signal equivalent to logic V0 appears (at the first inputs of the elements, In the initial state, at the first inputs of elements 10, -10 + logical units, at the second input element 10 is a logical zero, and on the second inputs of elements 10-10rt4., logical units Therefore, when O appears, input 1 of -10 to its output 1 gives O signal. This signal is delayed in element 11 by the value of T / ( n + 1) (to Lig, 3), where T is the period of clock oscillations, is fed to the input 2 of the element Yud, and to you 1 ode member 10 in turn on is O, which analogously extends from -11tt delays T / (n + 1) in each element 11 along the line quantizing 9 "corresponding signals at the outputs 1 illustrated by FIG. 3,

To support the self-oscillation process and set the desired oscillation period, the difference 1 from one of the outputs of the line elements 10 (in Fig. 3 - from the output 2 of the element 10) through the delay element 12 is fed to the input 2 of the element Yu {"The time of its arrival at the input 2, counted from the moment of the first differential O at the input 1 of the element 10, must be equal to T / 2. The time diagram of the signals at the input 2 of the element 10j is depicted in the last Graph of FIG. 3 "Signals about direct and inverted outputs 1 and 2 of elements 0 - Jup + 1 are given to the input of dynamic triggers 19 $ - 19g (nVi) j which overturn when one of the signs appears (Figs 1-4) reactions only to positive drops O - 1). The signal from the output 2 of the element 10 through the element OR 21 is fed to the counting input of the counter 13 "At its second input, the signal level is set

from point r, inverted in inverter 23, whose level (O11 or

1) allows the libr to count, or reset the contents of the counter (the presence of an inverter in the general case is optional,

When the signal on the input signal changes to negative, the negative difference 1 - O is formed in the shaper 3 of the meander, which, having passed through the switch 1, generates a pulse at the output of the differential lock. The pulse tilts the trigger-7 pulse 7 and thereby feeds the inputs 1 elements OR 10-g - 10h + t of the quantizing delay line 9 1m signal, which blocks the entire line At the same time, the pulse from the output BЈ is fed to the input of the delay element 15 and through the other delay element 14 to the input of the AND 8 element " point r has already established 1, pass a control input of the register 17 "in the register 17 is recorded on this command decrypted in de shiAratore 16 phase difference at the time of changing a sign on WMOs de Bx signal. 2 (moment tz in Fig. 2) and its ds sign (advance, lag), which is determined by the signal level at point e, at the control input of switch 1. After a delay in element 15, a pulse arrives at the input of element I 20, to another the input of which is supplied with a signal from the point g. Since by this time a signal 1 has been established at the point g, which opens element 20, then a signal appears at its output

50

and depends on the type of the selected counter- 5 which through the inverter 22 sets up; in fig. 1 shows an example of the use of ECL chip technology)

Thus, as long as input 1 of element 10 is present

The counter 13 goes to zero mode, the delayed pulse through the element OR 21 enters the input of the counter 1-3 and zeroes it. In addition, he entered

) lf

- 0

20

25

71109010

signal O, the counter continuously counts the number of elapsed periods of the quantizing signal for any point in time, and the triggers change their state; This entire process is illustrated in the table at the bottom of FIG. 3 (for four periods of the quantizing signal, starting from the first). The states of the triggers are assigned to their direct outputs. It is easy to see that for any time the contents of counter 13 and a column indicating the simultaneous state of 1 triggers 19 (nk encode an integer number of past periods of quantizing pulses (counter 13) and the fraction of the current partial quantum (state of the flip-flops 19). These codes enter the decoder 16 and are converted to a phase difference value in the desired code for use.

When the signal on the input signal changes to negative, the negative difference 1 - O is formed in the shaper 3 of the meander, which, having passed through the switch 1, generates a pulse at the output of the differential lock. The pulse tilts the trigger-7 pulse 7 and thereby feeds the inputs one . elements OR 10 -g-10h + t of the quantizing delay line 9 1m signal, which blocks the entire line. At the same time, the pulse from the output BЈ is fed to the input of the delay element 15 and through the other delay element 14 to the input of the AND 8 element. r has already been established 1, the pulse passes to the control input of register 17 "In register 17, this command records the value of the phase difference decoded in the converter 16 at the moment of changing the sign of the signal at input B. 2 (moment tz in Fig. 2) and its ds sign (advance, lag), which is determined by the signal level at point e, at the control input of switch 1. After a delay in the element; 15 a pulse arrives at the input of the element AND 20, to another input of which a signal is sent from the point g. Since by this time a signal 1 has been installed at the point g, which opens the element 20, a signal appears at its output,

thirty

35

50

which, via inverter 22, sets counter 13 to zero mode, a delayed pulse through the element OR 21 enters the input of counter 1-3 and zeroes it. In addition, he entered

ten

eleven

em to the control inputs of the flip-flops 19;) - 19g / P4.,} and brings them to the initial state. After that, the circuit is ready for the next cycle.

Option 2, The signal at input Bx.2 is ahead of the signal at input Bx.1 by an amount less than 180a, and switch 1 still connects points a (-b and a to b). The temporal relationships between the signals are illustrated in Fig. 4 - As in option 1, the impulse at the point in overturns the trigger 7 and triggers the quantizing line 9. The difference is that the impulse at the point vg appears when the negative half-period of the signal at input Bx1 has already ended, i.e. At this time, at point b and at the other input of the element 5, there is a signal corresponding to a logical one. Therefore the pulse passes through the AND element and overturns the trigger 6. The signal level at the control input of switch 1 at point e, 25 will change accordingly and the switch will switch on the new connection

input-output a 4

- b

J

aSL

The

the distribution of the signals itself will be reduced to option 1; at the same time, the pulse from the output of element AND 5 through element 30 OR 21 will ensure that the counter 13 is reset and the triggers are reset (0 to the initial state. The pulse at point

in „through the element

35

14, the delay still arrives at the input of the AND 8 element, but since at the point g, after the operation of the switch 1, O is set, the AND 8 remains closed and the command to write information to the register 17 does not arrive. In addition, a 40 pulse delayed in point 15 of the delay element 15 is not transmitted by the AND 20 element. since O is set at the other input, and the triggers 19 are not triggered at d5 while the quantizing delay line does not work (Fig. A).

All other possible combinations of phase difference and inclusions are reduced to the considered ones.

The positive effect of the proposed phase meter as compared with the known one is that it rises; the potential resolution of the phase measurement, the increased resistance to climatic effects and the aging effects of microcircuits, the probability of ambiguity decreases

1711090I2

the first counting of the course, marking the share of an unfinished quantum.

The essence of these effects lies in the TOMj that the introduction of additional elements and links improves the zero-counting mode of the whole quanta counter and the process of forming the code of the quanta fraction0. This eliminates the need to normalize the control pulse, in which the front is ahead of the reference frame of the reference signal and the section is delayed no more than a quantum period - Elimination of this pulse eliminates the possibility of counting errors due to the change in duration due to climatic influences and the aging of elements accordingly allows to reduce the duration of quantizing meanders, i.e. to increase the resolution of the phase measurement; Remembering the distribution of low and high levels of signals at the outputs of a quantizing line at the time of the zero-transition of the signal under investigation is replaced by stopping the counting of evenness - the oddness of the number of past Fronts of quantizing meanders (for each output of the line). Such a replacement reduces the time required to establish the corresponding code, i.e. allows you to increase the potential resolution of the measurement phase and at the same time reduce the probability of the ambiguous reading of this code near the moments of the change of the values of its bits

20

50

Claims (1)

Invention Formula A digital phase meter containing a switch of input signals connected to signal sources through shapers of meanders of the reference and studied signals, the outputs of which, one directly and the other through the pulse shaper of the signal under investigation, are connected to the inputs of a key element whose output is connected to the sign trigger trigger connected to output with a switch input and with a sign information output (a gas meter, a control trigger, the output of which is connected to the input of the second key element, the current delay line, consisting of .n + H elements, OR, between the first input of each of which and the first input of the next one, are included n elements of the back- Invention Formula A digital phase meter containing a switch of input signals connected to signal sources through shapers of meanders of the reference and studied signals, the outputs of which, one directly and the other through the pulse shaper of the signal under investigation, are connected to the inputs of a key element whose output is connected to the sign trigger trigger connected to output with a switch input and with a sign information output (a gas meter, a control trigger, the output of which is connected to the input of the second key element, the current delay line, consisting of .n + H elements, OR, between the first input of each of which and the first input of the next one, are included n elements of the back- and an additional delay element connected between the second input of the first OR element and the output of one of the subsequent ones, the first input of the first OR element and the second inputs of all the others are combined and are the input of a quantizing delay line, a quantizing pulse counter two delay elements, a decoder and a re - hyster, about tl and h and yushchi so that, in order to increase the potential resolution of the phase meter, the shaper of the pulses of the reference signal, 2 (n + 1) triggers of the third key element and two elements OR, with e the volume of the outputs of the OR elements of the quantizing delay line through the corresponding triggers connect- to the first information inputs of the decoder, the second information inputs of which are connected to the outputs of the quantizing pulse counter, and the output connected to the register, the output of which is the output of the Aasometer, the control input connected to the output of the second key element, the second input which through the first delay element is connected to the output of the pulse driver of the signal under investigation, which also through the second delay element and the third key element is connected to the trigger reset inputs via the first additional OR element and the first input of the second additional OR element, the second input of which is connected to one output of the first element OR quantizing line, and the output is connected to the input of the counter, the control input of which is connected to the output of the control trigger, also connected to the input uyuschey line and the second input of the third key element; and inputs connected to the outputs of the pulse formers of the test and reference signals, the input of the latter of which is connected to the second output of the switch input signals, in addition, other inputs of additional elements OR are connected to the output of the first key element 4