SU968765A1 - Digital device for determining speed and acceleration code - Google Patents

Description

The invention relates to a measurement technique and can be applied to determine a speed code and an acceleration code of varying physical quantities, the values of which are represented in digital form.

A digital speed meter is known, which contains a pulse generator (frequency divider and a quartz reference oscillator), which is connected to a memory block (register), keys and pulse counter 1 through a control unit that generates time-shifted pulses (delay line).

However, in such a device, it is necessary to use a pulse tachogenerator connected via a key to a pulse counter, which complicates the measuring system, in general, ensuring the formation of position, velocity and acceleration codes. At the same time, it is impossible to measure low speeds, as tachogenerators start to give out pulses only at a certain speed, which reduces the functionality of the device. No acceleration information.

The facility also reduces the functionality of the device's capabilities.

Closest to the present invention is a digital angular velocity and acceleration meter, comprising a pulse generator, an output connected to the input of the first code register, and also the second, third, and fourth registers of the C 2 code.

ten

However, the known device is difficult to operate.

The purpose of the invention is to simplify the device.

The goal is achieved

15 in that a digital device for determining a speed and acceleration code, comprising a pulse generator, an output connected to the input of the first register of the code, as well as the second,

20, the third and fourth code registers, the first and second adders and delay lines are entered, the input is connected to the output of the pulse generator, the first BE output by the output is set to

25 of the second register of the code, the information input of which is connected to the input of the device, the output of the second register is connected to the first input of the first adder and to the information input

Claims (2)

30, third register, setup input. which is connected to the second output of the delay line and to the setup input of the fourth register, the information input connected to the output of the first adder and the first output of the device, and the output to the first input of the second adder and information input of the first register connected to the second output of the device. The drawing shows the functional diagram of the device. The device contains a pulse generator 1, the line .2 is underwater, the second 3, the third 4, the fourth 5 and the first 6 registers, the first 7 and the second & adders. The code entering the device contains information about a physical quantity, the value of which varies with time, i.e. The code values can correspond to certain values of the angular or linear displacement of some object, its temperature, flow rate, etc. Registers are executed on clocked D-triggers. When a signal appears at the common input C, the code applied to the outputs D is recorded in the registers. This code immediately appears at the outputs of the register and its value is stored until the next clocked pulse arrives at the input C. Cy immators 7 and 8 of the combinational type / the difference value at their outputs appears immediately when the value of one or both of the input codes changes. Combination adders, according to the principle of action, do not require zeroing. . When the device is turned on, the registers can be reset by additional auxiliary circuits or set to an arbitrary state. AT . In both cases, during the transition period equal to three clock cycles of generator 1, the device issues speed and acceleration codes whose value differs from the true ones. Since the value of the test quantity represented by the input code varies over time, different code values are alternately recorded in the input register 3. These values are denoted by K (t), K (t2), ..., K (tn}. Registers 3-6 are executed on clocked D-flip-flops, and the front of each pulse arriving at the common input C- is set to register triggers in the state corresponding to the input code. Combination adders 7 and 8 form a difference in input codes with a delay due to the duration of transient processes in the applied element base. The first generator pulse 1 delayed by delay line 2 by iT time records the current value in register 3 code K. under study T, generator 1 generates the next pulse. This pulse, delayed by line 2 delay for time 0.57, rewrites register code 3 to register 4. This same generator pulse 1, delayed by time T, writes new current value of code K under investigation to register 3 Next, the described process is repeated, and after each. Period from register 3 is rewritten to register 4, and the next code value is written to register 3. Adder 7 determines the difference between the codes recorded in registers 3 and 4. This difference is an increment of the input C code for time and ie Merényi The code of the average rate of change of the input value during this time. The next clock pulse generator 1, delayed by time 0.5t, the speed code from the output of the adder 7 is written to register 5, and the next clock pulse is rewritten from register 5 to register 6. After. of this, the next speed code is written to register 5. The adder 8 determines the difference between the codes recorded in registers 5 and 6. This difference is an increment of the value of the speed code K for the measurement time Tc5m, i.e. acceleration code K input value. Thus, when the device is turned on, a transient process occurs, during which it is possible to obtain false information. The time of the transition process for the speed code does not exceed 2 Tu, uh / dl of the acceleration code of 4 Tz. This device has a simpler circuit execution, which increases the reliability of its operation when determining the speed and acceleration code. A digital device for determining a speed and acceleration code, comprising a pulse generator, an output connected to an input of the first, a code register, and a second, third and fourth code registers, characterized in that, in order to simplify the device, the first and second are entered adders and delay lines, the input connected to the output of the pulse generator, the first output - with the installation input of the second code register, the information input of which is connected to the input of the device, the output of the second register is connected to the first m input of the first adder and informational input of the third register, the installation input of which is connected to the second output of the delay line and the installation input of the fourth register, informational input connected to the output of the first adder and the first output of the device, and the output - c. the first input of the second adder and with the information input of the first register, the output of which through the second adder is connected to the second output of the device. Information sources, taken into account during the examination 1. Bogorad G.Е., Kiblitsky V.A. Digital controllers and meters speed. ; m-l. , Energie, 1966, with. 65. 2. USSR author's certificate No. 817593, CL G 01 R 15/08, 1978 (prototype).