SU1679400A1 - Statistical analyzer - Google Patents

Abstract

The invention relates to electrical measuring equipment and can be used in setting up complex electronic protections. The purpose of the invention is to simplify the device. The device contains a multilevel comparison unit 1, a switch 2, counters 4.1-4.N, a generator of 9 pulses, an indicator 13. Use as counters 4.1-4.N counters-frequency dividers, as well as the introduction into the device of the block 5 OR elements, block 6 counting resolution, counter-divider frequency 7, control unit 8, elements 10 and 11. Counter 12 provides a predetermined capacity of accumulators (counters) with a smaller number of microcircuits, which is especially advantageous with a large number of analyzed levels. 1 il.

Description

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The invention relates to electrical measuring equipment and can be used in setting up complex electronic protections.

The purpose of the invention is to simplify the device.

The drawing shows a block diagram of a statistical analyzer.

The statistical analyzer contains a multilevel comparison unit 1, switch 2, channel selection block 3, frequency counters 4.1-4.N counters, block 5 elements OR, counting resolution block 6, buffer counter frequency divider 7, control block 8, pulse generator 9 , the first 10 and second 11 logic gates And, output counter 12, indicator 13. The input of unit 1 is connected to the input of the device, and the outputs are connected to the first inputs of switch 2, whose control input is connected to the output of unit 3. The outputs of switch 2 are connected to counting counter inputs - share it 4.1-4.N, the outputs of which are connected to the inputs of the block elements OR 5. The output of block 5 is connected to the enable input of block 6, the prohibition input of which is connected to the input of block 8 and the output of counter divider 7. The output of block 8 is connected to the first input of the element 10, the second input of which is connected to the output of the generator 9, and the output to the counting input of the counter-divider 7, the second output of the switch 2 and the first input element And 11, the second input of which is connected to the output of block 6, and the output through the counter 12 is connected to the input of the indicator 13.

Statistical analyzer works as follows.

The input analog value arrives at the multi-limit comparison unit 1, which samples it by level. At one or several outputs of block 1, logical signals appear depending on the input value being in a certain bit of the measured value. In the information accumulation mode, the specified logical signals pass through switch 2 to the corresponding counters 4.1-4.N. These counters directly accumulate information, playing the role of memory blocks.

Reading information produced so. According to the signal of the control unit 8, the element 10 submits pulses from the generator 9 to the buffer counter-divider frequency 7 and to the second input of the switch 2. The latter transmits these pulses to one of the 4.1-4.N frequency dividers counters in accordance with the control signal block 3 channel selection. Pulses filled

The selected counter-frequency divider to the end. When the next pulse is applied, a signal appears at its output, which through block 5 of the OR elements is fed to the resolution input of the counting permission block b, made in the form of a trigger. At the indicated signal, block 6 is set to the position Allowed and, with its output signal, gives permission to the element AND

11 to pass the pulses from the generator 9 to the counter 12, the counting of the pulses begins. Block 5 transmits a signal from any of the frequency divider counters 4 to block 6 for the resolution resolution.

The end of pulse counting determines the buffer counter-divider 7 after its overflow. Its output signal resets control unit 8 and count resolution unit 6.

This signal appears after the appearance of the output signal of the selected frequency divider counter, moreover, with a delay of the number of pulses in it before going into the information reading mode. Due to this, the number accumulated in the selected frequency divider counter is transferred to the counter 12. Moreover, the same number is again entered into the selected counter-frequency divider.

The result of the conversion is displayed on the indicator 13.

Claims (1)

Invention Formula A statistical analyzer containing a multilevel comparison unit, the outputs of which are connected to the first inputs of the switch, the outputs of which are connected to the inputs of counters, a pulse generator and an indicator, characterized in that, in order to simplify the device, frequency-counters are used as counters, with the logic block, the counting resolution block being entered into the device, a buffer counter-frequency divider, a control unit, a channel selection unit, two AND elements and an output counter, the input of a multi-level comparison unit is connected to the device input, the inputs of the logic unit are connected to the outputs of all frequency divider counters except the buffer one, and the output is connected to the enable input the block of the account resolution, the prohibition input of which is connected to the output of the buffer counter-frequency divider and the input of the control unit, and the output to the second input of the second element I, the output of which through the output counter is connected to the input of the indi Ator, the control unit output is connected to a first input of the first AND gate, the second input of which pod516794006 the keys to the output of the pulse generator, and the first input of the second element I, control - the output to the second inputs of the switch, the input of the switch is connected to the output of the buffer counter-frequency divider and the house of the channel selection unit.