SU1219922A1 - Range finder - Google Patents

Abstract

The invention relates to a measuring and computing technique, relates to electronic pedometers for determining the distance traveled over a medium terrain, and is used in sports and medicine. The device contains a sensor 1 step driver 2 pulses of the sensor step, a generator of 3 pulses, the element And 4, a binary multiplier 5,

Description

 CO ND

ABOUT

binary counter 6, decimal counter 7, digital indicator 8 and 6jjoK 9 input of the scale factor. When driving on the ground (a sensor of 1 pitch triggers, at the output of the generator. 2 pulses of the pitch sensor, a high level signal appears which permits the passage of 4 pulses of the generator 3 to the input of a binary multiplier 5, the output of which is formed every

The invention relates to measuring and computing equipment, in particular to electronic pedometers, designed for measuring the distance traveled by a user, over a medium terrain, and can be used in sports and

medicine. I

The purpose of the invention is the expansion

functional capabilities and increased operational capabilities.

FIG. 1 shows a block diagram of a device for measuring distance; in fig. 2 - structural 1shema of the pulse pickup pulse generator; in fig. 3 is a block diagram of the input of the scale factor; in fig. 4 is a binary multiplier circuit diagram.

The device for measuring the distance (FIG. 1) comprises a step sensor 1, made, for example, in the form of an electromagnetic reed sensor, a driver; 2 pulses of the step sensor, generator of 3 pulses, element 4, binary multiplier 5, binary counter 6, decimal counter 7, digital indicator 8 and block 9 for inputting the scale factor.

The shaper of the 2 pulses of the pitch sensor (Fig. 2) contains J) triggers | 10 and 11, a binary counter 12, the elements NOT 13 and 14, and the element NOT 15.

The scale factor input unit 9 (FIG. 3) contains B-triggers 16 and 17, AND-NO elements 18-20, AND 21, binary counter 22, eight-channel multiplexers 23 and 24, and decimal counter 25.

home step of a burst of pulses, with the number of pulses in each burst proportional to the average length of the displacement. These pulses are summed up in the binary counter biv when it is overflowed to the counting input of the decimal counter 7. The distance covered in meters is monitored using a digital indicator 8. 3 h. to f. 4 il.

Binary multiplier 5 (figure 4) contains a binary counter 26, eight-channel multiplexers 27 and 28, the elements And 29 and 30 and the element 31.

The output of the sensor 1 step is connected to the input of the imager 2 pulses. The output of the generator 3 pulses connected to the first input element And 4, the second input of which is connected to

the output of the driver 2 pulses.

The output of the element And 4 is connected to the first (number-pulse) input of the binary multiplier 5, the output of which is connected to the counting input of the binary

counter 6. The overflow output of binary counter 6 is connected to the counting input of the decimal counter 7. The discharge outputs of the decimal counter 7 are connected to the first group of inputs

digital indicator 8, the second group of inputs of which is connected to the group of outputs of the decimal bits of the block 9 of the input of the scale factor. Another group of outputs - binary bits of block 9 is connected to

the second inputs of the binary multiplier 5.

Clock, inputs of D-flip-flops 10 and 11 and binary counter 12 are interconnected and connected to one

from the output buses of the pulse generator 1 (in Fig. 1, this connection is not shown). An informational) input of the trigger 11 is connected to the output of the HE element 13, the input of which is the input of the pulse former 2 and connected to the output of the step sensor 1. The input element NOT 14 is connected to the output of one of the bits of the binary counter 12, and the output to the inputs to blocking the account of the counter 12 and the zero reset input D-trig

Hera 11. The output of the D-flip-flop 11 is connected to the zeroing input -D-flip-flop 10 whose informational LI input is connected to the output of the And 15 element, and the output to the zeroing input of the binary counter 12 and the first input of the And 14 element and the And 4 element of the device . The second input element And 15 is connected to the output element NO 13.

V-. The counting input of the binary counter 26 is connected to the output of element 4 of the device, and the outputs to the corresponding address inputs of eight-channel multiplexers 27 and 28 and to one of the inputs of the element 30 that performs the function of a single-channel multiplexer in the block. The output of the first multiplexer 27 is connected to the input of the AND 29 element. The other input of the element AND 29 is connected to the output of the NO 31 element, the input of which is connected to the number-pulse input of the binary multiplier 5. The output of the AND 29 element is the output of the binary multiplier. The information inputs of the multiplexers are interconnected in an appropriate way according to a known scheme and connected to the corresponding bits of the binary counter 22 of the scale factor input unit 9.

The information D inputs of the triggers 16 and 17 are connected to the control buses M - Slow input and B - Fast input, which are connected via keys to the logical unit formation sources (in Fig. 3, sources and keys are not shown). The first input of the NAND 18 element is connected to the generator bus | on which frequency i is present, providing a slow data input speed, and to the gate inputs 1) triggers 16 and 17. The first input of the NAND 19 element is connected to the bus generator, on which frequency i is present, providing a relatively high speed of information input. Both input speeds (frequencies -i, and ij) of the selection () are such that when a user enters a scale factor numerically equal to the length of his step, the user can visually monitor the input information using a digital indicator 8. The second inputs of the elements II-NOT 18 and 19 are connected to the outputs of the D-flip-flops 16 and 17, respectively.

219922

and the outputs - to the inputs of the element AND-NOT 20, the Output of this element is connected to the first input of the element And 21 and the counting input of the binary counter 22.

5 The outputs of the binary counter .22 bits are connected to the corresponding address inputs of 8-channel multiplexers 23 and 24, with the most significant 7th bit of the binary counter 22 being connected directly to the first information input of the multiplexer 24. The output of the multiplexer 24 is connected to the first information input of the multiplexer 23 whose output

15 is connected to the second input of the And 21 element. The remaining information inputs of the multiplexers 23 and 24 are interconnected in an appropriate way and connected to the sources of the NIN logical and zero levels and one. Binary counter 22, multiplexers 23 and 24, and element 21, with these connections, form a 7-bit binary multiplier that performs

25 in block 9 of the function of the scaling code converter. The control code for such a binary multiplier converter is binary code 1100011. The low order code

30 1 is fed to the first information input of the multiplexer 24 directly from the outputs of the 7th bit of the binary counter. As a result, at 127 input pulses arriving at the counting input of the binary counter 22, 99 output pulses are generated at the output of element 21, which are fed to the counting input of the decimal counter 25. The R inputs of counters 22 and 25 are connected to each other and connected to the bus Setting zero The outputs of the bits of the binary counter 22 form the first group of outputs of block 9, which is connected to the corresponding inputs of the binary multiplier 5, and

40

45

50

The bit moves of decimal counter 25 form a second group of outputs of block 9, which is connected to the corresponding inputs of digital indicator 8, which allows you to control the input of information on a digital board at the time of input or correction of the scale factor (average step length of the user body).

55 The shaper of 2 pulses of the sensor of 1 step is made according to the scheme of formation of a pulse of calibrated duration with chatter protection

tact group reed switch. The duration of the formed time interval is determined by the input frequency 1p, coming from one of the buses of the pulse generator, and the volume of the binary counter 12.D-triggers 10 and 11 function as bounce protection elements of the sensor contacts and synchronization. When a high-level signal (logical unit) arrives at the input element HE 13 from the output of the sensor 1 step, the leading edge of the frequency pulse 1 is triggered by L) -the trigger 10, working in conjunction with the element EH 15 in the latch mode, allowing operation of binary counter 12. At the moment binary counter 12 overflows, a signal is generated at its output, which, through element NOT 14, blocks the operation of binary counter 12 and enables the L-trigger 11 to process the signal of the end of the formation of a time interval of a calibrated duration. At the same time, if the input signal of the sensor 1 of the step 1 is still present at the input of the driver 2, then the trigger 11 of the signal of the end of the formed interval does not work, but waits for a steady level of logic zero. When the signal of the driver of the zero generator appears at the input 2, the trigger 11, which causes driver 2 to its initial state. The practical time for forming the pulse width of the forwarder 2 is 0.2-0.3 s and is determined by the technical capabilities of the sensor 1 step, in particular by its inertia.

Before the device starts operating, the user needs to enter into the device the values of the average length of his step into the device. For this, resetting the counters 22 and 25, including the corresponding bus keys M and B in the counters 22 and 25, writes the binary N, Q and decimal N, 0 codes in the ratio

N ...

 rrno

mi

Thus, when entering a scale factor (average step length), the information is controlled by the user in the decimal number system, and its binary integer equivalent is entered into. device automatically.

ten

s

The operation of the device's binary multipliers is based on the principles of multiplexing: The type-multiplexing of the logical states of the bits of the 7-bit control code. Since the technical solution of the binary multiplier of block 9 is similar to the binary multiplier 5, their operation will be considered using the binary multiplier 5 as an example. When a binary multiplier 5 arrives at the counting multiplier 5, the frequency of the bits of the counter 26 and therefore, the addresses of the switched

15 channels of multiplexers 27, 28 and 30. At each input pulse at the output of multiplexer 27, the logical unit response level or zero of the multiplication control code 20 present at the information inputs of the multiplexers appears in the sequence determined by the regularity of the output number- pulse flow with a clever25 input frequency on a binary parallel code. NO element 31 delayed input pulses often30

35

0

0

five

You Ig, coinciding with the levels of logical units present at the second input of the element And 29, pass to the output of the multiplier. As a result, at the output of element 29 there is a pulsed flow, the average pulse frequency of which is proportional to the binary control code.

The distance measuring device operates as follows.

In the initial state, the counters 6 and 7 are set to zero, and on the control inputs of the binary multiplier there is a parallel binary code proportional to the value of the average user step length entered into the device using the scale factor input unit 9. When driving on the ground, the sensor of 1 pitch is triggered, and at the output of the generator of 2 pulses a high level signal appears, which permits the passage through the AND element 4 of the pulses of the generator 3 to the input of a binary multiplier. The number of pulses of the generator 3 for a given duration of the formation of the enable signal of the driver of the 2 pulses must be equal to the number of pulses

.7-bit binary counter 26

7

multiplier or a multiple of it as 2 1, t 0,1 2, ..., k, i is the multiplicity number (in this case the volume of the 7-digit counter 6 of the device should be also increased with a multiplicity of 2). As a result of multiplying the input frequency {d by a parallel binary code of the user's step length, at the output of multiplier 5, a burst of pulses with the number of pulses in each burst proportional to the average displacement length is formed at each step. These pulses are summed in the binary counter biv when it overflows to the counting input of the decimal counter 7. The distance traveled in meters is monitored by a digital indicator 8. In addition, the volume of the counter 6 is selected so that the overflow signal at its output corresponds to the accumulation movement of the user in 1 m.

In the case when the user only needs to know the number of steps he walked, not meters, then in block 9 of the input of the scale factor it is forced or by turning on the control value M and B the number 99 is set.

Thus, the proposed device solves the problem of counting the number of steps and can solve the problem of measuring the distance traveled by the user as it moves along a flat or middle terrain.

Claims (3)

1. A distance measuring device comprising a pitch sensor, the output of which is connected to the input of the pulse former, a decimal counter, the discharge outputs of which are connected to the first inputs of a digital indicator, characterized in that, in order to expand information capabilities and enhancement of operational capabilities, a scale factor input block, a binary multiplier, a binary counter, a pulse generator and an AND element are entered, the first input of the AND element is connected to the output of the pulse generator, the second input it is connected to the output of the pulse shaper, and vkod - the first input of the binary multiplier, the second 228 the inputs of which are connected to the first Group of outputs of the input block of the scale factor, and the output - to the counting input of the binary counter, the overflow output of which is connected to the counting input of the decimal counter, the second group of outputs of the scale factor input block is connected to the second inputs of the digital indicator. 2. A device according to n.t, characterized in that the pulse shaper is made in the form of two D-flip-flops, two elements NOT a binary counter and an NAND element, the gate inputs of the L-flip-flops and the counting input of the binary counter are connected to each other and to the first output bus of the pulse generator, the information D input of the first trigger is connected to the output of the NAND element whose first input is connected with informational input of the second trigger and exit the first element NOT, the input of which is the input of the imager, the second input of the element NAND is connected to the input of zeroing the binary counter, the output of the first 3) trigger and  the output bus of the imager, the output of the binary counter through the second element is NOT connected to the output of blocking the operation of the binary counter and zeroing the second L flip-flop, the output of which is connected to the output .nuvleni first 3J-trigger. V: -. :, - ..,. ; l 3. The device according to A.1. O TL and - that the block of input / scale factor is made in 3) -trigger, three elements AND-NOT, AND element, binary counter; ten counters and two eight-channel multiplexers, the gating inputs of 1 triggers with are connected to the first input of the first IS element and the output bus of the pulse generator, the information input of the first trigger is connected to the first control bus, the output is connected to the second input of the first NAND element, the first input of the second NAND element is connected to the output bus of the pulse generator, the second input is connected to the output of the second D-trigger, information the input of which is connected to the second control bus, the outputs of the first and second elements of the NAND are connected to negiBbM and the second inputs of the third 9 the NAND element whose output is connected to the counting inputs of the binary counter and the first inputs of the I element, the second input connected to the output of the first eight-channel multiplexer, and the output to the counting input of the decimal counter, the outputs of the bits of the binary counter are connected to the address inputs n the first and second multiplexers, the first information input of the second multiplexer and the first group of outputs of the input block of scale factors, the output of the second multiplexer is connected to the first information input of the first m the ultiplexer, the second, third, quarter, sixth, seventh and eighth information inputs of which are connected to the fifth information input of the second multiplexer and the logical unit formation bus, and the remaining information inputs of the multiplexers are interconnected and with the bus forming the logical zero, the counters zeroing inputs are connected between each other and with the zero setting bus, and (the outputs of the decimal counter are connected to the second group of output 992210 dong block input scaling factors. 4, The device according to claim 1, ° O TL and - so that the binary 5 the multiplier is made in the form of a binary counter, two eight-channel multiplexers, two AND elements and a NOT element, and the binary counter count input is connected to the input of the NOT element and the binary multiplier input, the output of the element is NOT connected to the first input of the first element And, the second input of which is connected to the output of the first multiplexer, and 5 the output is the output of the binary multiplier, the address inputs of the multiplexers and the first input of the second element I are connected to the corresponding inputs of the bits of the binary counter, 0 the output of the second multiplexer is connected to the first information input of the first multiplexer, and the remaining information inputs of the multiplexer are connected to each other, with the second 5 entrance of the second element And with the bus control binary multiplier,: and the output of the second element And is connected to the first information input of the second multiplexer. Fig2 20 -one 25 f -t  I I