SU1377908A2 - Device for measuring digital maximum and minimum period of signal recurrance - Google Patents

Abstract

The invention relates to the technique of magn. records The purpose of the invention is to increase the reliability of the measurement. The writing to the register 13 is controlled by the presence of an enabling signal from both the gating unit 10 and the binary-decimal code comparison unit, which generates a signal to prevent the device from rewriting the register 13 from falling. The prohibition signal is generated when comparing the setpoint code 9 and the current code value from the output of switch 5. When the input signal from switch 5 drops out, the code of the period value increased compared to the limit value is sent to the binary-decimal code comparison block, which leads to the formation of signal to prohibit the rewriting of the contents of register 13. In this way, the effect of signal deposition on the measurement result is reduced. 3 il. cl

Description

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The invention relates to a technique of magnetic recording, namely, devices for measuring the period of the reproduced signals, and is an improvement of the known device according to the basic author. St. No. 1190417.

A device for measuring the maximum and minimum period of the signals, containing a block for forming time intervals, is known. The reference pulse generator, the control unit, designed as a driver for control commands and a switch, two counters, two strobe units, a memory unit made on two registers, an indicator, and two analysis units.

The loss of the input signal leads to measurement errors of the signal generation period.

The purpose of the invention is to increase the reliability of measurement by eliminating false results due to signal fallout,

FIG. 1 shows a block diagram of the device; in fig. 2 is a functional diagram of a node comparing codes and writing to a register of a memory block; in fig. 3 - / schematic diagram for setting the code for the limit of the measured signal period. The device contains a shaper 1 time intervals, a generator of 2 reference pulses, a control unit 3, having in its composition a shaper 4 control commands and a switch 5, the first 6 and second 7 counters, a node 8 for comparing codes and writing control, setting the 9 limit measurement code of the signal period, gating blocks 10 and 11, memory block 12 performed on pe1 I-fear 13, 14, indicator 15 and analysis blocks 1 and 17.

The code comparison and recording control node 8 comprises a binary-decimal code comparison block 18 and a match element 19.

In block 18, the comparison of the binary-decimal codes includes the element OR 20, the inverters 21 and 22, the elements 23 and 24 of the coincidence, and the elements 25-27 of the analysis of the bit-by-bit analysis of the binary-decimal code.

The dial 9 of the code of the maximum measured signal period is made in the form of a set of push-button switches 2B.

The device works as follows.

 Before the measurement, the shaper 1 is reset to the initial state, the counters 6 and 7 are reset, the register 13 is reset and the maximum code value is set in register 14. The mode is set by the shaper 4 control commands and gates 10 and 1.

In the measurement mode, when the first input pulse is received by the shaper 4 control commands, the counter 6 is switched on in the counting mode of the reference pulses of the generator 2.

When the second pulse is received by the shaper 4 of the control commands, the counting of the pulses of the generator 2 in the counter 6 is stopped and starts in the count 7. Then the process is repeated cyclically. The code values from counters 6 and 7 through switch 5 are transmitted to analysis blocks 16 and 17, where the code values are compared with the code value of registers 13 and 14. In case the code value of switch 5 is greater than the code value in register 13, then the code of switch 5 rewritten to register 13; if the code value of switch 5 is less than the code value in register 14, then the code of switch 5 is rewritten into register 14. The code values of registers 13 and 14 from are displayed on the indicator 15. These code values are displayed until blocks 16 and 17 are received t code values are larger or smaller than code values of registers 13 and 14, respectively.

The writing to the register 13 is controlled in the presence of an enable signal both from the gating unit 10, and from the binary-decimal code comparison unit 18. The generation of signals for rewriting the contents of register 13 is carried out by a match element 19.

A binary decimal code comparison unit 18 generates a signal to prohibit the rewriting of the contents of register 13 when the input signal of the device drops. The prohibition signal is generated when comparing the setpoint 9 code, the code value of which is typed by pushbutton switches 28 is 1.5 times the value of the measured period code, and the current code value from the output of the switch 5. The analysis element 25 compares the low bits of the code 26 and 27 analyzes, respectively, the higher bits of the code. The OR element 20 collects the comparison results for the binary-decimal code. If the input signal from the switch 5 drops out, the period value increased compared to the limit value arrives at the binary-decimal code comparison block 18, resulting in the output block 18 signal prohibit the rewriting of the contents of the register 13.

Claims (1)

Thus, the effect of signal deposition on the measurement result is reduced. Invention Formula Device for measuring maximum and minimum periods after Q 15 0 signals on auth. St. No. 1190417, characterized in that, in order to increase the reliability of the measurement by eliminating false results due to the fallout of signals, it is equipped with a setter of a code for the maximum measured signal period, a matching element and a binary-to-ten comparison unit, one input connected to the output of the setpoint of the code of the maximum measured signal period, the other to the output of the control unit, the output is connected to the first input of the Match Element, the other input of which is connected to the output of the first gating unit, and Exit elementary matcher that is connected to the control input of the register the maximum value of the measured period of the memory block. Thebes.2 Fig.Z