SU1674392A1 - Discrete data transceiver - Google Patents

Abstract

The invention relates to telecommunications and can be used in automated control systems for industrial facilities. The purpose of the invention is to improve the noise immunity. The transceiver contains multiplexer 1, decoder 2, memory blocks 3 and the first and second elements 4 and 5. In the proposed transceiver, the goal is achieved by the fact that one-time interference in any data line leads to the loss of information units 3 memory, but due to the integrating properties of memory blocks 3, the information at their outputs is not distorted. 1 il.

Description

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The invention relates to telecommunications and can be used in automated control systems for industrial objects.

The purpose of the invention is increased noise immunity.

The drawing shows a block diagram of the proposed transceiver

The discrete information transceiver contains multiplexer 1. decoder 2. memory blocks 3 and first and second elements 4 and 5

The device receiving and transmitting information works in the following manner. The cyclically varying code arrives at the address input of multiplexer 1, in turn polls the lines of information inputs.

When transmitting information, the signal from the polled line is gated by the signal from input 6 of the reading and enters the data line. When receiving information on the address

inputs 7 of the decoder 2 receive address signals, providing the possibility of a signal appearing at one of the outputs of the decoder 2 The signal from the data input H is fed to the second element And 5 to the input of the memory block 3 is determined by the address code. Since the address codes change cyclically, the signal at the input of the memory block 3 will repeat with a period equal to the period of the address change cycle. After integration by the block 3 watches and the corresponding

information output will form a stable output signal.

The memory blocks 3 are an integrator with different constants of charge time (T3) and discharge (gr). For protection from single interferences,

to Gr 2 n + 1 g,

: 0

: 4b Sl) Yu Yu

where n is the address bus width; rp (2N 4-1) g3,

where N is the size of the code transmitted successively along the line.

The use of the invention allows to significantly increase the noise immunity of the device. In a known device, one-time interference on data lines can lead to the loss of units of information, and interference to the address and control bus lines can lead to out-of-sync and loss of all information during a given exchange period. In the proposed device, azoic interference in any lines of data transmission leads leads only to the loss of information units at the inputs of memory blocks 3, but due to the integrating properties of the memory elements, the information at the outputs is not distorted.

JL B 6

Claims (1)

Formula of Invention A discrete information transceiver containing a multiplexer, a decoder, memory blocks whose outputs are the information outputs of the transceiver, the information inputs and the address input of which are respectively the D inputs of the multiplexer and the A input of the decoder, different In order to increase the noise immunity, the first and second elements I are connected in series into it. At the same time, the first input of the first element I is connected to the output of the multiplexer, and the output of the second element I is connected to the C-input of the decoder to the inputs of the respective memory blocks, the second input of the first element AND is the read input of the transceiver, whose recording input is the second input of the second AND element, the first input of which is the data input of the transceiver. g Hd