SU1515176A1 - Device for monitoring temperature - Google Patents

Abstract

The invention relates to automation and computing and can be used in automatic systems for monitoring and measuring temperature, as well as other parameters of complex objects. The aim of the invention is to improve the reliability of the device by digitally compensating for temperature and time drift. The device contains object 1 sensors, analog switch 2, analog-digital converter 4, first synchronization unit 3, first memory block 10, first comparison circuit 11, exemplary equivalents of sensors 5, transmitter 6, receiver 7, second synchronization unit 8, multiplexer 9 the second memory block 12, the second comparison circuit 13, the control unit and the setting of the settings 14. 7 Il.

Description

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The invention relates to automation and computing and can be used in automatic systems for monitoring and measuring temperature, as well as other parameters of complex objects.

The purpose of the invention is to increase the reliability of the device.

Figure 1 shows the structural diagram of the device in figure 2 - functional diagram of the first synchronization unit; On fig.Z - functional transmitter; figure 4 is a functional diagram of the second synchronization unit; FIG. 3 is a functional diagram of the receiver; FIG. 6 is a functional diagram of the first comparison circuit; Fig. 7 is a functional diagram of the control unit and the setting of the settings.

The device contains object sensors 1, analog switch 2, first synchronization unit 3, analog-digital converter A, exemplary equivalents of sensors 5, transmitter 6, receiver 7, second synchronization unit 8, multiplexer 9, first memory unit Yu, first comparison circuit 11 , the second memory unit 12, the second comparison circuit 13, the control and setting unit 14, the inputs and outputs 15-59. In addition, the device contains a clock pulse generator 60, a counter-divider 61, a double counter 62, an input register 63, elements OR 64.1 and 64.2, a converter of 65 pulses into a paraphase code, a generator 66 of pulse packets, counter 67, a delay element 68, shaper 69 pulses, element 2I-1SHI 70 shift register 71, delay element 72, element AND 73, comparator 74, first element AND 75, element OR 76, second element AND 77.

The control unit (Fig. 7) contains a decoder 78, first 79 and second 80 registers, subtractor 81, divider 82, multiplier 83, adder 84, memory node 85, counter 86, trigger 87, first element OR 88, multiplexer 89, element 90 matches, second element OR 91, first 92, second 93 and third 94 elements I.

The device works as follows.

Information from the sensors of object 1 is fed to the information inputs 15 of analog switch 2, which

64

Depending on the address code that is fed to the control input 16 of the analog switch 2 from the output 17 of block 3, connects the output of the corresponding sensor 1 to the input of the analog-digital converter 4. The first synchronization unit 3 generates two continuous pulse sequences arriving at the output 18 block 3, from the output of the generator 60 clock pulses of block 3 (figure 2) and from the output of the counter-divider 61, forming a pulse with a frequency in

 N + M is 1 times smaller than generator frequency 60 and a duration equal to the period following the generator 60. At output 17 of block 3, binary counter 62 generates a binary N address code of the sensor address, which is switched by the pulse decay at the output of counter divider 61.

At the output of the analog-digital converter 4, an M-digit temperature code of the corresponding sensor is generated, which, together with the address code, is entered into the input register 63 of the transmitter 6 (FIG. 3) by the pulse decay at the output of the counter-divider 61 of the block 3, and then under the control of the pulses of the generator 60 of block 3 is transmitted over a two-wire communication line by bipolar 1g pulses (a single information is transmitted by a positive pulse on the first line, and a negative information is transmitted to the second, zero information - negative on the first communication line and and a positive for the second After the transfer of the temperature codes and

Sensor numbers are transmitted by an extended transmission end signal. During the transmission of information about the temperature of one sensor, the temperature is converted following

sensors 1 into a digital code chain; sensor 1 - commutator 2 - analog-to-digital converter 4. Receiver 7 converts the input serial code into parallel, giving information

about the sensor temperature at output 25 and its output number 24. After receiving the information when the extended pulse arrives at the receiver 7, the receiver 7 generates a reception end signal at the output 23. The reception end signal starts the operation of the second synchronization unit 8, which generates four read pulses output 28, four write pulses on vyho

15

de 27, delayed relative to readout nanometers, and a double bottom bottom code at output 26, defining the type of read setpoint. For each impulse, the countershunches, the address to which is formed from the code of the sensor number and the code of the setpoint, are sent to the address inputs 41 and D2 of the memory block 12 and through the information inputs 29 and 30 of the multiplexer 9, in the absence of a write pulse, to the address input 33 memory block 10, information is read from memory blocks 10 and 12. The memory of unit 10 stores for each sensor four settings that determine the operating range and temperature limits of the object to be monitored (warning upper and lower and alarm upper and lower). The values of the settings in the memory block 10 are recorded with no errors taken into account at the beginning) {th installation and taking into account the errors in the system at each change in the II values of the error by impulses, we form the output 55 of the control unit 14 and set the settings. Here, the information from output 53 of block 14 is allocated to memory block 10. Shaping pulses on the 55th unit 14 and controlling the multiplexer 9 is carried out by recording pulses, generating) at the output 27 of the control unit 8. Start-up mode and device. The facilities are set by applying a pulse to the input of the device, according to which unit 14 records the set codes in memory unit 10. The first comparison circuit 11, depending on the type of setpoint determined by the code at the output 26 of the synchronization unit 3, reveals the prevalence of the upper warning and alarm setpoints or a decrease in the temperature value of the lower warning and alarm setpoints. Detected by the first comparison circuit 11, the deviation mark from the working (limit) temperature range is fed to the input 45 of the second comparison circuit 13, to the input 46 of which the deviation mark is received from the output of memory block 12, fixed 1a in the previous sensor polling cycle by the first circuit 11 compare. When the indicated change labels are equal, the output to the input 50 of the unit 14 and to the output 59 of the device appears at the output of the second comparison circuit 13. WR information recording

5 0 5 About Q 0

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766

A memory unit 12 is carried out on each write pulse at the input 44 of the second memory unit 12, and the value of the change mark from the output of the comparison circuit 11 is entered into the second memory unit 12. Such an organization of control over the boundaries of the settings makes it possible to exclude the device from issuing false information caused by random disturbances in the system. The information at the output 58 of the device is considered true with a single value of the signal at the output 59 of the device, i.e. by repeating the label of the deviation of any sensor in two adjacent polling cycles.

The monitoring of the error of the system and its stabilization is carried out as follows.

Two analogous equivalents are connected to the input of analog switch 2. sensors 5 with output signals equal to the output signals of the sensors at zero temperature and at maximum ((.) produced at the output of analog-digital converter 4 when connected to it by an analog switch 2 of an exemplary zero-temperature (Md) equi-sensor) (Adequate component of the error.) The code obtained at the output of the analog-digital converter when the analog switch 2 is connected to it is an exemplary equivalent of the maximum temperature (M), contains the Spines characterized by a constant offset and a change in the conversion factors of the analog elements of the system (additive and multiplicative error components) .In the initial installation of the device in memory block 10, the addresses corresponding to the sensor numbers, instead of which exemplary sensor equivalents 5 are included, are written instead of setting codes codes of zero and maximum temperature, respectively. When receiving information from the model equivalent of sensors and in the absence of error in the system at the output of the first c Comparisons 11 are absent. If the received code differs from the code recorded in memory block 12, when receiving information from the model equivalent of sensors, a change mark appears on the output of the first comparison circuit 11, indicating that there is an error in the system.

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 If there is a change mark in the next polling cycle in the process of receiving information from the same exemplary sensor, a signal appears at the output of the second comparison circuit 13, indicating a systematic nature of the buzz. When the signals at the inputs 49 and 50 of the bridge 14 coming from the outputs of the first 11 and second 13 comparison circuits coincide, in the process of receiving information from the exemplary equivalent of the sensors 5, block 14 is executed. At this, block 14 memorizes - the introduction of codes from the model equivalents of sensors 5 and the calculation of the new values of the settings, taking into account the error that has been made, according to the formula

M,

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 M -

 AA and COP

 VCT

The calculated values of the settings are recorded in the first memory block 10. The addresses corresponding to the sensor numbers, instead of which the model equivalents of the sensors are included, are written to the codes received from these equivalents. Thus, after adjusting the settings when receiving information from the model equivalent sensors at the output of the comparison circuit 11, there will be no change mark until additional errors appear in the device, while the device operation in the error compensation process is similar to that described earlier.

The functional diagram of the computing unit 1A is shown in FIG. 7. Decoder 78 decrypts the number of the received sensor. The signals at outputs 1 and K correspond to the numbers of exemplary equivalents of sensors 5 of maximum and zero temperature. Registers 78 and 80 memorize codes from exemplary equivalents of sensors 5, respectively, maximum and zero temperature. The subtractor, divider, multiplier, and adder 81-84 are calculated by the formula, the memory node 85 stores the initial set codes, as well as the codes corresponding to the model equivalents of the sensors 5 without taking into account the errors of the device. Counter 86 generates an address sequence for memory node 85, simultaneously arriving at output 54 and

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Q 5

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5 30 -

Q

five

five

used when writing data to the first memory block 10. When the device is initially installed, an initial pulse arrives at the input 52 of block 14, through which trigger 87 is charged and the counter 86 is set to zero. The signal from the output of trigger 87 allows the recording of information from the sensor equivalent equivalents to registers 79 and 80 through the OR 88 h element switches multiplexer 89 to transfer data from the output of memory 85 to output 53 of block 14. For each write pulse arriving at input 51, counter 86 is switched and pulse passes to output 55 through element 90 no. Upon completion of the initial setup of the device, the overflow signal from the output of the counter 86 clears the trigger 87 and prevents the passage of pulses through the coincidence element 90. Removing the signal from the output of the trigger 87 causes the data multiplexer 89 to connect from the output of the adder 84 to the output 53 of the block 14. During device operation, when receiving information from exemplary sensor equivalents and having signals at the outputs of the first 11 and second 13 comparison circuits, arriving 49 and 50 of block 14, information is recorded in registers 79 and 80. When writing information to one of registers 79 or 80, the SLI 91 element is set to the zero state Counter 86, compressing the prohibition signal from the input of the coincidence element 90. For each write pulse at input 51, the set codes are read from memory node 85, corrected for this value taking into account the error by multiplier 83 and adder 84, and data is transmitted via multiplexer 89 to output 53 of block 14. After all settings are read from node 85 memory By the overflow signal from the output of the counter 86, the passage of pulses through the coincidence element 90 is prohibited.

Block 14 can be implemented on the basis of the microprocessor technology with the task of the program operation programmatically. In this case, the capabilities of the device can be disassembled. In particular, it is possible to install exemplary sensor equivalents with output signals near the lower and upper

boundaries of the range that do not correspond exactly to the boundaries of the range, but also with the weight (parameters with high accuracy.

The invention makes it possible to increase the reliability of temperature control by introducing digital compensation for the temperature and time drift of the parameters of the analog elements of devices. Using the receiver and transmitter allows to increase the reliability of the information transmitted over the communication line when the sensors are removed. The use of information about the temperature out of set limits that coincide in two adjacent polling cycles allows to increase the resistance of the device to random disturbances,

Claims (2)

Invention Formula 1, A temperature control device containing an analog switch, a first synchronization unit, an analog-to-digit converter, a first comparison circuit, a first memory block and object sensors, outputs connected to the corresponding information inputs of the analog switch. the output of which is connected to the input of the analog-digital converter, and the control input with the address output of the first synchronization block, the output of the first memory block is connected to the first information input of the first comparison circuit, characterized in that, in order to increase the reliability of the device, a control and setting unit, a second synchronization unit, a multiplexer, a second memory unit, a second comparison circuit, exemplary equivalents of the sensors, a transmitter and a receiver, outputs of the exemplary equivalent of the sensors connected to corresponding information inputs of the analog switch, the output of the analog-digital converter is connected to the information input of the transmitter, the address input of which is connected to the address output of the first synchronization unit, the sync output connected to the sync input of the transmitter, the output of which is connected to the input of the receiver whose sync output is connected to the control the input of the second synchronization unit, the address output of the receiver is connected to the first information input of the multiplexer, the first address input of the second block n The first input of the control and setting unit is the first output of the device, the information output of the receiver is connected to the second input of the first comparison circuit and the second input to the control and setting unit, the first code of which is connected to the information input of the first memory block, the address input connected to the output of the multiplexer, the second information input of which is connected to the code output of the second synchronization block, the second address input of the second memory block controlling the input of the first comparison circuit and is the second output of the device, the output of the first comparison circuit is connected to the first input of the second circuit, comparative H1, the third input of the control unit and settings) / settings, the information input of the second memory block and is the third output of the device, the output of the second memory block is connected to the second input of the second comparison circuit, the output of which is the fourth output of the device and connected to the fourth pass of the control and setting unit, BTopoff the output of which is connected to the third information input of the multiplexer, control input D which is connected to the write output of the second synchronization unit, the write input of the second memory block and the fifth input of the control unit and the settings, the sixth input of which is the device input, the read output of the second synchronization unit is connected to the read inputs of the first and second memory blocks, the third output of the control unit and the setting is connected to the recording input of the first memory block. 2. The device according to claim 1, wherein the control and setting unit contains a decoder, first and second registers, a reader, a divider, a multiplier, an adder, a memory node, a counter, trigger, multiplexer, match element, first and second elements OR, first to third elements AND, decoder inputs are the first input of the block, data inputs of the first and second registers;) s are BTopbiM input of the block, inputs of the third AND element are and the fourth block inputs, respectively, the first input of the element Sov1 15151 the pads and the control input of the memory node are the fifth input of the block, the setup of the Pl1 trigger input and the first counter reset input is the sixth input of the block, the decoder outputs are respectively connected to the first inputs of the first and second elements, And the output of the third element I is connected to the first the input of the first element OR, Q output connected to the second inputs of the first and second elements AND, the output of the first element AND is connected to the strobe and the first input of the second element AND, you are 15 the course of the second element AND connected About the strobe input of the second register and with the second input of the second element I, the output connected to the second reset input of the counter, the output of the trigger trigger is connected to the control input of the multiplexer and the second input of the first element OR, the output of the coincidence element is connected to the counting input of the counter and is third output block 25 outputs 76: 12 the first register is connected to the inputs of the decreasing exponent, and the outputs of the second register are connected to the inputs of the subtracted subtractor and the inputs of the first adder, the inputs of the second addend connected to the multiplier outputs, and the outputs to the data inputs of the first multiplexer group, the data inputs of the second group connected to the outputs of the node the memories that are connected to the inputs of the first multiplier multiplier, the multiplexer outputs are the first output of the block, the counter outputs are connected to the address inputs of the memory node and are the second The output of the block, the outputs of the subtractor are connected to the inputs of a divisible divider, the inputs of the divider are connected to the setpoint bus, and the outputs of the divider are connected to the inputs of the second multiplier, the overflow output of the counter is connected to the trigger reset input and the second input of the match element. J FIG. itFig. five