SU1365093A1 - Device for simulating communication systems - Google Patents

Abstract

The invention relates to digital computing and communication technology and can be used to model communication systems and computing systems that use a method of checking codes for compliance with the physical meaning. The purpose of the invention is to expand the functional capabilities of the device by simulating the verification of message codes for belonging to a given class of messages. The device contains a counter of 1 transmitted messages, a display unit 2, a counter of 3 undistorted messages, a generator of 4 message pulses, a counter of 5 messages that meet the test criterion, a sensor of 6 random numbers, a generator of 7 random noise interference pulses, an AND 8 element, a 9-element block OR , comparison circuits 10-12, memory registers 13, 14, switches 15, 16, registers of maximum 17 and minimum 18 numbers. 1 il. (L

Description

The invention relates to digital computing and communication technology and can be used to model communication systems and computing systems that use a method of checking codes for compliance with the physical meaning.

The purpose of the invention is to expand the functionality of the device by simulating the verification of message codes for a given class of messages.

The drawing shows a diagram of the device.

The device contains a counter 1 of transmitted messages, a display unit 2, a counter of 3 undistorted messages, a generator of 4 message pulses, a counting of interference pulses at random points in time generate pulses of random duration allowing the interference (error) code to pass through the switch 16 to the inputs of the RHH element block 9. This simulates the process of imposing interference (errors) on the information process.

From the outputs of the block of elements OR 9, the code enters the input of the register 14, which is intended for the operational storage of codes. From its outputs, the code is fed to the inputs of comparison circuits 10-12. The other inputs of the second 11 and third 12 comparison circuits from the outputs of the registers 17 and 18 receive, respectively, the codes of the maximum and minimum allowable limits of the change of emissions.

There are 5 messages that satisfy the crooked 20 subset of the input test signals, and 6 random signals.

numbers, random flow generator 7 - If the transmitted and ka interference pulses coincide, an AND 8 element, a block of received codes at the output of an OR 9 circuit, the first 10, the second 11 and the third 12 comparison circuits, the first 13 and second 14 memory registers.

10 comparisons, a signal appears that comes to the counting input of the counter 3. If the received code is greater than the minimum acceptable limit code, then the output of the comparison circuit 12 is a control signal arriving at one input of the And 8 element. When the code is less than the code of the maximum permissible limit, then at the output of the comparison circuit 11 a control signal appears, arriving at another

The first 15 and second 16 switches, the registers of the maximum 17 and minimum 18 numbers.

The device works as follows.

Before the device starts operating, through its installation input, the installation inputs of all counters receive a control signal that nulls these counters. Register 3 records the code combination that models the information message to be collected, transmitted and processed. Registers 17 and 18 record the codes of the minimum and maximum allowable limits of variation of the allocated subset of input signals.

From the output of register 13, the code combination arrives at the information input of the switch 15 and at the second input of the comparison circuit 10. The generator 4 generates a sequence of pulses arriving at the control input of the switch 15. The pulse counter 1 counts the number of pulses from the output of the generator 4.

From the switch output 15, the code combination enters the inputs of the block of elements OR 9,

The sensor 6 random numbers generates random codes of interference received at the information input of the switch 16. The generator 7 random flow

With the coincidence of the transmitted and the received codes at the output of the circuit

10, a signal appears that is sent to the counting input of counter 3. If the received code is greater than the minimum acceptable limit code, then the output of the comparison circuit 12 is a control signal that arrives at one input of the And 8 element. - if the code is less than the code of the maximum permissible limit, then at the output of the comparison circuit 11 a control signal appears, arriving at another

input element and 8

At the same time, if the conditions for checking the code for compliance with the minimum and maximum limits of the selected subset are satisfied, then the output of the element And 8 appears a pulse arriving at the counting input of the counter 5.

input element and 8

The outputs of the pulse counters are connected to the inputs of the display unit 2, which is intended to indicate the main parameters of the simulated process. Thus, on the display unit 2, the number of codes (messages) involved in the information process (the contents of counter 1), the number of codes (messages) that have passed the information process (contents of counter 3), the number of codes (messages) that respond check conditions (counter contents 5).

Claims (1)

Invention Formula A device for simulating communication systems, comprising a message pulse generator, the output of which is connected to the counting input of the transmitted message counter and the control input of the first switch, a random flow generator of interference noise, the output of which is connected to the control input of the second switch, first and second memory registers , the register of the maximum number, the register of the minimum number, the first comparison circuit, the equality output of which is connected to the counting input of the counter of undistorted messages, the message counter, checking criteria, the installation inputs of all the counters are combined and are the installation input of the device, the bit inputs of the first memory register are the information input of the device, and the bit outputs of the first memory register are connected respectively to the information inputs of the first switch and the inputs of the first group of the first comparison circuit, the inputs of the second group of which are connected respectively to the bit outputs of the second memory register, characterized in that, in order to expand the functional Q 5 about 5 0 capabilities by simulating the verification of message codes for a given class of messages, it further comprises a random number sensor, second and third comparison circuits, a block of OR elements and an element, And the outputs of the first and second switches are connected respectively to the inputs of the block of OR elements whose output is connected respectively, with the bit inputs of the second memory register, the bit outputs of the maximum number register are connected respectively with the inputs of the first group of the second comparison circuit, and the bits the minimum number register outputs are connected respectively to the inputs of the first group of the third comparison circuit, the inputs of the second group of the second and third comparison schemes are connected respectively to the bit outputs of the second memory register, the output is less than the second comparison circuit connected to the first input of the AND element, the second input of which is connected with the output More than the third comparison circuit, the output of the AND element is connected to the counting input of the message counter satisfying the test criterion, and the bit outputs of the random number sensor connect us with information respectively second switch inputs.