SU1552343A1 - Digital frequency synthesizer - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to expand the operating frequency range while improving the accuracy of setting the law of phase change. The digital frequency synthesizer contains a reference oscillator 1, a setup unit 2 codes, accumulating adder 3, a block of inverters 4, a counter 5, a block 6 comparing codes, an adder 7 codes, el-8 and a low-pass filter 9. The frequency of the generator 1 is fed to the counter 5, and its codes are sent to the comparison unit 6 directly, as well as through a series-connected accumulating adder 3, a block of inverters 4 and the adder 7. Next, using the And 8 and filter 9, a short pulse is formed, the position which depends on the code on the control inputs of the accumulating adder 3. At the same time, the AND-8 selects closely spaced excess pulses, leaving their number for a period equal to the set code. Due to this arrangement, the accuracy of setting the phase change law is increased. The expansion of the operating frequency range is provided by operating the device at a frequency N times higher than the frequency of the generator 1. 1 sludge.

Description

The invention relates to radio engineering and can be used in radio communications and in measurement technology.

The purpose of the invention is to expand the range of operating frequencies while increasing the accuracy of setting the closed Laz's variation.

The drawing shows a structural electrical circuit of a digital frequency synthesizer,

The digital frequency synthesizer contains a reference oscillator 1, block 2 of setting codes, accumulating an adder quantity for a period of 1 / N f3r, equal to (HC) 3, block 4 of inverters, counter 5, with the set code. In this way,

block 6 comparison of codes, adder 7 codes, the element And 8, Ailtr 9 low frequencies.

The synthesizer works as follows.

The frequency of the reference generator 1 is fed to the input of counter 5 and the pulses from the output of the higher bit of counter 5 are fed to clock input NA 3. Under the action of these pulses HC 3 at the overflow output, it normalizes the sequence of pulses with the average repetition frequency corresponding to the code that sets

due to the arrangement, the accuracy of the Laz law of change is improved. Since the NS 3 operates at the EG / M frequency and the other nodes are highly frequency 20, the digital frequency synthesizer is capable of operating at a frequency of N

times higher than with f9f, which provides an extension of the range of barrel frequencies.

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25

Claims (1)

Invention Formula Digital frequency synthesizer containing serially connected unit 2 installation on the control input -JQ installation unit codes, accumulating dah HC 3. from counter 5, comparison block 6, block 4 of inverters, adder 7 and element 8 forms a short pulse for the duration of the overflow pulses of the HC 3, the position of which depends on the code on the control inputs of the HC 3. Under the action of clock pulses from the output of the most significant bit of the 5 HC 3 counter. On the code outputs, it sets a number equal to the remainder of the summation. This code value remains constant over the period of clock pulses HC 3. The specified code is inverted in block 4 of the inverters and summed in the adder 7 with the number N-1. The resulting code is fed to one of the inputs of the comparison unit 6, at the other input of which the code is output from the output of the count 35 40 45 an adder and an inverter unit, a reference oscillator, a counter and a low-pass filter, characterized in that, in order to expand the range of operating frequencies while improving the accuracy of setting the law of base variation, between the output of the inverter unit and the low-frequency input of the lower frequencies are entered consequently connected adder codes, a block comparing codes and elements And, the second input of which is connected to the overflow output of the accumulating adder, the input and the counter outputs of the counter are connected respectively to the output of the reference generator and correspondingly by their bitwise inputs of the second group of inputs of the code comparison unit, the clock input of the accumulating adder is connected to the output of the high ten four As a result, at the output of the comparator unit 6, pulses appear that are shifted by the number of periods of the clock frequency f equal to the set code. The maximum frequency of these pulses fu is determined by the value of fu. i.e. practically determined maximum operating frequency of the drive. Using the overflow signal HC 3, the element And 8 selects closely spaced excess pulses, leaving them due to the arrangement, the accuracy of the Laz law of change is improved. Since the NS 3 operates at the EG / M frequency, while the other nodes are high-frequency, the digital frequency synthesizer is capable of operating at a frequency of N times higher than with f9f, which provides an extension of the range of barrel frequencies. ra 25 Invention Formula A digital frequency synthesizer containing serially connected five 0 five an adder and an inverter unit, a reference oscillator, a counter and a low-pass filter, characterized in that, in order to expand the operating frequency range while improving the accuracy of setting the law of base variation, between the output of the inverter unit and the Lilthr input of the lower frequencies are entered sequentially connected adder codes , the code comparison unit and the And element, the second input of which is connected to the overflow output of the accumulating adder, the input and the bit outputs of the counter are connected respectively to the output of the reference generator and to the corresponding the secondary inputs of the second group of inputs of the code comparison block, the clock input of the accumulating adder is connected to the output of the higher