SU1495783A1 - Device for multiplication of ternary code by two - Google Patents

Abstract

The invention relates to devices for performing mathematical operations and can be used to multiply in logical nodes of information systems with pulse inputs and outputs. The purpose of the invention is to reduce hardware costs. A new device for multiplying the ternary code by two is a reduction in the number of ternary elements on which the device is built (six elements instead of eight). 2 Il. 1 tab.

Description

The invention relates to devices for performing mathematical operations and can be used to multiply in the logical nodes of information systems with pulse inputs and outputs.

The aim of the invention is to reduce hardware costs.

The device for multiplying the ternary code by one and two is complete. on six ternary elements, each of which performs ternary operations, described in Table.

The summing inputs are equivalent to the read input to the inputs except for the sign of the output pulse, which is opposite, and the first and second summing (subtracting) dyes are equivalent to each other.

FIG. 1 shows a schematic of a device for multiplying a ternary code by two; FIG. 2 shows the time diagrams of its operation with conventional symbols.

The device for multiplying the ternary code contains six ternary elements 1-6, input 7 and output 8 of the device.

The system of clock power supply of the device is three-phase. A clock pulse of the first phase receives positive pulses at the input 7 of the device, and also information is read from elements 5 and 6. The clock pulses from the second and third phases read information from elements 1, 2 and 3.4.

FIG. 2 denotes: timing diagrams 9–11, respectively, of the first to third phases of the clock supply, time diagram 12 pulses at the input 7 of the device; the time diagrams of 13–18 recording and scoring pulses, respectively, from elements 1–6.

At the input 7 of the device, the code in the ternary notation with the digits +, 0, -1 (pulses of positive and negative polarities) is entered in lower digits, where the sign

(L

with

QD & 1

00 oci

the numbers are determined by the high order sign.

The output 8 of the device receives the re-result of multiplying the number by two.

In Fig. 2, in the first to third cycles, a time diagram of multiplying the number 1 (-1) -3 -2j, pHa two, the result of the multiplication is -1-3% (-1) -3 .10

The device works as follows.

When the first one arrives, a positive pulse (the first digit of the number at input 7 by the clock pulse t5 of the first phase of the first step will be transmitted according to the logic of the work recorded in the table to the first subtractive input of element 2) by the clock pulse of the second phase 2 is transmitted to the first subtractive input of element 3 and the first summing input of element 6; by the clock pulse of the third phase, the negative pulse from element 3 is transmitted to 25 the first subtractive input of element 5, by the clock pulse of the first phase of the second so This negative pulse from element 5 is transmitted to output 8 (the first bit of the result of multiplying 30 numbers by two), a positive pulse from element 6 is transmitted to the first summing input of element 1 and the second summing input of element 4, and the Formula

the invention

A device for multiplying the ternary code by two, containing six ternary elements, the output of the first ternary element being connected to the first and second summing inputs of the second ternary element and to the first subtractive input of the third ternary element, the first summing input of which is connected to the first and the second subtractive inputs of the second ternary element and the output of the fourth ternary element, the output of the fifth ternary element is connected to the second summing input of the sixth ternary element, the output of which is connected to Exit device, characterized in that in order to reduce hardware expenses, information inputs are connected device. Not with the first subtractive inputs of the first and fourth ternary elements, the first summing inputs to topbix are connected to the output of the third ternary element and the second summing and second connecting inputs of the fifth ternary element, the first summing and first subtracting inputs of which are connected respectively to the outputs of the fourth and first ternary elements , the output of the second ternary element is connected to the first sumgo of the ternary element, the second subtractive input of which is connected to the output of the fifth ternary element.

A valuable pulse (the second bit of the 35- by peace and subtractive inputs of the hex) is fed to input 7 and transmitted to the first subtraction input of element 1, the third-phase clock pulse transmits a positive pulse from element 4 to the second subtractive input 40 of element 5. by the pulse of the first phase of the third cycle, the negative pulse from element 5 is transmitted to the output of 8 (the second result of multiplying the Number by two). 45

2, a fourth to tenth cycle is shown showing a time diagram of multiplying the number -1-3 + (- 1)

by two, the result of the multiplication is (-1) -3U 1 (-1) -3 + + 1-3 +196. . Device is working

50

ten

1495783

Formula

the invention

A device for multiplying the ternary code by two, containing six ternary elements, the output of the first ternary element being connected to the first and second summing inputs of the second ternary element and to the first subtractive input of the third ternary element, the first summing input of which is connected to the first and the second subtractive inputs of the second ternary element and the output of the fourth ternary element, the output of the fifth ternary element is connected to the second summing input of the sixth ternary element, the output of which is connected to Exit device, characterized in that in order to reduce hardware expenses, information inputs are connected device. Not with the first subtractive inputs of the first and fourth ternary elements, the first summing inputs to topbix are connected to the output of the third ternary element and the second summing and second connecting inputs of the fifth ternary element, the first summing and first subtracting inputs of which are connected respectively to the outputs of the fourth and first ternary elements , the output of the second ternary, the element is connected to the first summing and subtractive inputs of the six

the third ternary element, the second subtractive input of which is connected to the output of the fifth ternary element.

and subtractive inputs

similarly.

FI.1

Claims (1)

Claim A device for multiplying the ternary code by two, containing six τρό binary elements, the output of the first ternary element being connected to the first and second summing inputs of the second ternary element and to the first subtracting input of the third ternary element, the first summing input of which is connected to the first and second subtracting the inputs of the second ternary element and the output of the fourth ternary element, the output of the fifth ternary element is connected to the second summing input of the sixth ternary element, the output of which is connected to the output m device, characterized in that, to reduce hardware expenses, information inputs are connected device. with the first subtracting inputs of the first and fourth ternary elements, the first summing inputs of which are connected to the outputs of the third ternary element and the second summing and second subtracting inputs of the fifth ternary element, the first summing and first subtracting inputs of which are connected respectively to the outputs of the fourth and first ternary elements, the output second ternary. element is connected to the first summing and subtracting inputs of the sixth ternary element, the second subtracting input of which is connected to the output of the fifth ternary element. The total number of pulses (+1) entering the inputs Item output Summarizing Subtracting 0 0 0 1 1 0 2 2 0 0 1,2 -1 1 2 -1 1,2 0 +1 2 1 +1 fie. / w I