SU1462406A1 - Device for output of graphic information - Google Patents

Abstract

The invention relates to automatics and computing and can be used to output graphical information from a computer. The purpose of the invention is to increase the speed of the device, this is achieved by introducing the element OR 17, the address switch 18, the memory block 19 and the corresponding functional links. The invention makes it possible to shorten the time of image modification. 1 silt

Description

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The invention relates to automation and computing and can be used to display graphical information from a computer.

The purpose of the invention is to increase the speed of the device.

The drawing shows a diagram of the device.

The device contains;: a generator of I pulses, a counter of 2 points, a counter of 3 lines, a counter of 4 addresses, a group of elements I-5, the first 6 and second 7 decoders, the first 8, the second 9, the third Yu, the fourth 11 and five in 12 triggers , the shift register 13, the element And 14, the adder 15, the television indicator 16, the element 1ShN 17, the switch 18 addresses and the memory block 19 addresses displayed words,

The device works; t as follows.

The pulse generator 1 generates high frequency pulses: corresponding to the required screen rasterization horizontally, which arrive at the input of the 2 point counter and the synchronization input of the shift register 13, shifting the information contained therein, which is stored from the EVI memory, the shift capacity register 13 is equal to the memory word width. The recalculation coefficient of the 2-point counter corresponds to the TV-stopset of the horizontal scan width. The signal from the high-order output of the 2-point counter enters the 3-row counter input, which recalculates image lines into frames and has a recalculation period corresponding to the frame scan duration ,

The signals from the outputs of the counter 2 points and the counter 3 lines arrive at the inputs of the first 6 and second 7 depters. The first decoder 6 generates a control signal to write the information word to the shift register 13 and toggle the first trigger 12, which allows the video signal to pass from the shift register 13 through the AND element 14 during the visible frame and horizontal sweeps, and the horizontal pulse formation signals generated by the first trigger 8, the pulse of the lower-case protective band formed by the second trigger 9, the personnel pulse generated by the third trigger 10, and pulse 5

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sa frame zagzitnoy bands formed by the fourth trigger 1.

The components of the television sync mix thus obtained, together with the video signal coming from the output of the And 14 element, are converted by the adder 15 into a standard television video signal, which is fed to the video input of the television indicator 16 ,. The signals from the output of the second decoder 7 are sent to the elements AND 5 groups, on which, together with the signals from the outputs of the second 9 and fourth 11 triggers, the next word request signals from the computer are formed, and the next memory word request is aligned in time with the previous word shift in shift register.

The address counter 4 generates consecutive word read addresses that are received through the switch. 18 to the address inputs (D) of the memory block 19; In the memory block 19, the addresses of reading words from the computer memory are recorded, in which information is displayed on the 3-screen. Control signals for reading the words of the computer memory are generated by the second decoder 7 and through the elements of the 5th group on the visible field of the frame are output to the first control outputs of the device. In the computer memory, fields or windows of information can be recorded, each of which is contained in its own group memory cells. To ensure simultaneous display on the screen of these windows with overlapping parts of one window onto another, a computer calculates a sequence of read addresses, which is written on the reverse fields, lines and frames in memory block 19. The access of the computer to the device is generated at the output of the element OR 17 and is fed to the second control output of the device. When recording information from the computer to the memory unit 19, the first information inputs of the switch 18 are supplied with the address of the memory unit 19, the information input is set to the information inputs of the memory unit 19, and a write signal is supplied to the control input. To move on the screen of one window relative to another, it is enough to recalculate the new sequence of addresses for reading words from the computer memory and to write these addresses into a memory block of type 19,

In this case, it is not necessary to re-arrange the information in the computer memory, which significantly reduces the time for obtaining a new image. The computer can independently operate with each window, while not distorting the information in others, since the floor of the windows in the computer memory is stored in different places.

Thus, the proposed solution allows to expand the field of application and increase the device speed by providing multi-window, display and modification of information stored in the computer memory.

Claims (1)

Invention Formula A device for outputting graphical information containing a pulse generator, point counter, row counter, address counter, AND element, AND group of elements, first and second decoders, first, second, third, fourth and fifth triggers, shift register The adder, the output of which is connected to the video input of the television indicator, the information inputs of the adder are connected to the outputs of the first, second, third, fourth triggers and to the output of the element I, the first input of which is connected to the output of the fifth trigger, the setting inputs of the first, third, fourth and fifth triggers are connected to the first, second, third, fourth and fifth outputs of the first decoder, the fifth output of which is connected to the control input of the shift register, the output of which is connected to the second input of the element And, the clock input of the shift register and the counting input of the point counter are connected to the output of the pulse generator. the first outputs of the point counter and row counter are connected respectively to the counting input and the reset counter of the address counter, the second output of the counter of points is connected to the information input of the second and the first information input of the first decoder, the second information input of the first decoder is connected to the second output of the row counter, count input which is connected to the third output of the point counter, the first inputs of the elements AND groups are connected to the outputs of the second decoder, the second and third inputs of the elements AND groups are connected to the outputs respectively, the second and fourth triggers, the outputs of the AND elements of the group are the control outputs of the next word request from the computer, and the information inputs of the shift register are the first information inputs of the device, characterized in that, in order to increase the speed of the device, it contains the element OR, the switch the address, the block of addresses of the displayed words, whose address input is connected to the output of the address switch, whose control input is connected to the output of the OR element, the first information input the address switch is connected to the output of the address counter, the second information input of the address switch is the address input of the device, the output of the OR element is the control output of the write enable to the device’s memory, the output output of the device is the output of the memory, information and control the inputs of which J are respectively the second information and control input of the device.