SU920819A1 - Graphic information display device - Google Patents

Description

one

The invention introduces processes and characteristics on the screen of a cathode-electron tube (CRT) and can be used to indicate various signals that are converted into electrical form.

A device for displaying information on a CRT screen is known, in which an input analog signal is converted into a digital-to-digital converter (ADC) unit in digital form and stored in memory. Then, in the display mode, the stored information is read from the memory at the horizontal scanning frequency, converted into a time interval, highlighting the illuminated column on the CRT screen along the horizontal scanning axis. The size of the column is proportional to the word read from the memory, and the set of columns displays the shape of the memorized signal 1.

With the help of a known device it is impossible to remember and display

on the screen, the number of ordinates of the process, the number of which is greater than the number of lines on the CRT screen (500).

A device for displaying unambiguous functions is known in which a memory block is connected via a register and a digital comparator with an indicator input, in addition, the output of the address counter is connected to the address input of the memory block, and the output of the counter is connected to another input of the digital comparator. The synchronizer. With its outputs is connected to the corresponding inputs of the address counter and the counter. The information during one frame is read using the address counter from SjrioKa memory and through the register enters the digital comparator input, which comparing each digital word of memory C, the output signal of the counter linearly increasing in time during the duration of one line, forms a digital converter 3 code - time, the output signal of the digital converter forms on the CRT screen a sequence of luminous lines, the length of which is proportional to the size of the digital words recorded in memory block 2. However, this is GUT has no possibility in this mode highlight on the CRT screen values of digital words, which number would exceed the number of rows of the raster CRT 4 «500J screen, since one digital word vysvechivaets for one picture line CRT. In addition, the device does not have the ability to move along the vertical frame axis of the screen on a CRT image. Information and change the time scale of the image. The purpose of the invention was -. increased display space. This goal is achieved by the fact that a device containing serially connected ADCs and a memory block whose output is connected to the output of the first counter, the setup input of which is connected to the first synchronizer output, the second and third outputs of which are connected to the setup and clock inputs of the second counter and the comparison circuit connected to the CRT, the first input of which is connected to the output of the first counter, and the input of the ADC is the input of the device, serially connected integrator and divider, which is connected, are entered About the second input of the comparison circuit, two code generators, the output of the first of which is connected to the information input of the first counter, and the output of the second one - to the input of the divider, a reversible counter, the information input of which is connected to the output of the second code generator, the setting input is connected to the installation input of the integrator and the second output of the synchronizer, and the clock input of the t is with the fourth output of the synchronizer, and the element I, whose inputs are connected to the output of the revision counter and the fourth output of the synchronizer, respectively but, and the output is to the clock inputs of the first counter and the integrator | the input of which is connected to the output of the memory unit. The drawing shows a block diagram of a device. The device consists of ADC 1, memory 2, integrator 3, divider C of comparison circuit 5, CRT 6, first counter 7, second counter 8, drivers 9 and 10, And 11 elements, reversible counter 12, synchronizer 13. Moreover, the output of ADC 1 through memory 2, integrator 3, divider 4, comparison circuit 5 is connected to CRT 6, the output of driver 9 is connected via counter 7 to memory 2, a. the output of the code 10 generator is connected to another divider input and to the information input of the reversible counter 12, the output of which is connected via an AND 11 element to the clock inputs of the estimator 7 and integrator 3, the output of the counter 8 is connected to another input of the comparison circuit 5. In addition, the third output of the synchronizer 13 is connected to the clock input of the counter 8,: the second output of the synchronizer 13 is connected to the installation inputs of the reversible counter 12, the integrator 3 and the counter 8, the fourth output of the synchronizer 13 is connected to the clock input of the reversible counter On the other input of the circuit AND 11, and the third output of the synchronizer 13 is connected to the installation input of the counter 7, the device operates as follows. i The analog input signal is applied. , at . The first cell of memory 2 records the initial value of the input information, and the last value of the input information is recorded in the last cell of memory 2. The information is then read from memory 2 and displayed on the screen of the CRT 6. The CRT 6 has a raster scan, with the lines arranged vertically. On each line, a luminous pillar is formed, the value of which is proportional to the individual value of the m-information recorded in memory 2, and the set of pillars gives an image of the entire information ({). If you set a zero number on the shaper 9, and a shader 10 is the number where k is the number of words written in memory 2; g is the number of lines in the image, then at the beginning of the frame sweep, the counter 7 frame pulses coming from the synchronizer 13 will be set to the zero state. At the beginning of the first line of the image, integrator 3 is reset to zero, and counter 12 is set to the number N dialed on the imaging unit 10. At the output of counter 12, there is a logical unit that opens the element. AND 11. Pulses from the fourth output of the synchronizer 13 the frequency of which is much higher than the frequency of the lines arriving through the element 11 at the clock input of the counter 7, sequentially selects the information from memory 2. This information is integrated in block 3 and is fed to the input of the divider k. At the same time, the pulses from the fourth input of the synchronizer 13 arrive at the clock input of the counter 12, which, producing the count back through the N input pulses, forms a logical zero at its output, closing the element 11. Thus, at the beginning of the horizontal scan, the element 11 passes N pulses, which leads to reading from memory 2 N first words, which are summed in integrator 3; Divisor divides the integration result also by N times, while at the output of the divider, the arithmetic average of the N first words written memory 2. Then, for the entire line scan, the digital number at the output of divider 4 is compared in the scheme of comparison 5 with the linearly increasing signal at the output of counter 8, forming a luminous column on the first line of the CRT image proportional to the average value of the first words of memory 2 . Similarly, on the second line of the image on a CRT screen there is a column, the value of which is proportional to the average value of N WORDs of memory 2, having an address in the diagonal of N + 1-2N. During the entire frame scan, the entire process recorded in memory 2 is displayed on the screen. Moreover, despite the fact that the memory capacity is much greater than the number of lines of the image, each word recorded in the memory affects the image on the screen. 9 6 If any number is set on the imaging unit 9, at the beginning of the frame scan counter 7 is set to state M, and on the CRT screen at the beginning of the frame scan the information is displayed, starting with Memory Cell 2 to the last Memory Cell, and then from the zero cell to the M-1 cell, which will illuminate the last column on the CRT image. If then the number 1 is set on the imaging unit 10, then at the beginning of the line scan counter 12 will pass only one pulse through the element 11 11, while only one word will be read from memory 2. In this case, the information recorded in the memory cells between H and M + n will be displayed on the CRT screen. In the particular case, if And equals zero, then the first n words from memory 2 are displayed on the tap. Thus, the device allows the stored information to be displayed on the screen, the number of words in which Significantly Exceeds the number of the image line on the CRT screen, while the device performs averaging stored in memory 2 information. The device can also shift the image of the stored processes or characteristics along the frame scan by starting the display of information from the selected address of the memory cell 2. In addition, the device allows to highlight in more detail the part of the process recorded in memory 2 that the operator is interested in. In this case information is displayed on the screen , stored in each individual memory cell 2, but not all the information recorded in memory 2, but only a part of it is displayed. The proposed device can be widely used to indicate x Characteristics, such as frequency spectra, or processes that have a long duration, but do not repeat periodically in time. Such processes include complex shock processes, complex transients in electrical circuits, seismic processes, etc. In addition, the device is very useful when registering biological processes. These processes are periodically repeated in time, but their frequency is so small that it is very difficult to observe them on the oscilloscope screen, since the image is constantly ground

Claims (1)

Claim A device for displaying graphic information containing an analog-to-digital converter and a memory block connected in series, the input of which is connected to the output of the first counter, the installation input of which is connected to the first output of the synchronizer, the second and third outputs of which are connected to the installation and clock inputs of the input 25 - with the fourth output synchronizer, and the And element, the inputs of which are connected to the output of the reverse counter and the fourth output of the synchronizer, respectively, and the output to the clock inputs is first o counter and integrator, the input of which is connected to the output of the memory block.