SU1278830A1 - Device for displaying information - Google Patents

Abstract

The invention relates to indicator control devices for representing symbol systems and can be used in devices for displaying information on a matrix-type scoreboard. The aim of the invention is to expand the field of application of the device by providing the possibility of scaling images in two coordinates. The device contains a memory block, two comparison blocks, three registers, three adders, two switches, two decoders, a matrix display panel, a pulse generator, a counter, two code converters, an OR element, a one-shot and a trigger. From $ The device allows you to mix images horizontally along with commands at its input, as well as automatic horizontal scaling. 1 il.

Description

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The invention relates to the calculation of the device: control of indicator devices for representing the systems of symbols and M (.) FF1 to be used in display devices of information on a table of mitric chi.

The aim of the invention is to expand the areas of application of the device by ensuring the possibility of a table (K)); images along two coordinates.

The schematic of the display device is shown on the same drawing,.

The device contains a b.yuk i memory, a first block 2, block 11, Blopoii b, choke 3 era pei, the first register 4. the second register o, the first adder (, Hepiibui switch 7, the first decimator 8, the mat) 9, second de; 11 liu limp, first transducer 1 1, Biopon matrix 12, ieuepaTop li iKvniy; ls, counts; n-1 14, third re | -r 15, gg-t adder PC second transducer. 17 ,, third converter 18 cods) in, BToposi com. Ator 19, elemept OR 20, ai; oi ibrat (Jp 21, trigger 22.

Memory unit 1 “is e -; - with a memory device and; ipe ;; iia3; a-c: i for storing KO; I, OB ordinates 1 of the signal to be followed.

Register 1 1 4 and 5 iipe; Uia3iiai spy for s.1.1 storage and storage eooTBCiCTBc-iuio lock; noiO I maximum codes orgpktg slsduemo1CH), register 15 SL.G1G1,;, l record U storage maximum k., ;; ; i; the signal being followed horizontally ..

Counter 14 is predetermined; 5p ;,; m: m) e1 of the cope of the address input,: memory and r ;; horizontal scan; 13b) even; 1and the signal under investigation on the matrix. () | Night and bathroom 9.

Transducer 1 I codec is used to convert the code for pmgl.spsp ordinates and is not responsive; C1: r1; alaz;: o; k; lnitelpy code, and convert. I7 and IK i-.o additional prefixes for P1 e-abbreviation: respectively, the maximum difference code; biK): and the minimum org.:, i1; at-s isss, those; 1уе 1гс. 1) and the code of the max. | 1) His value is given by the signal of his) Oto, gga /) And the city of the code | commutator 1 7 and I).

Tripper 22 serves as T1 H1: advertisement (member of the device in the N-press ".Record ii" (IGG.

The device for displaying information works as follows;

According to his report, “Initial is the first case, 1i:) e; and 5 usol: on the set-up inputs of registers 4, G;, 15, the PI outputs are set to $ 15: 1 register

4 --- the maximum Boaaviox iioe of the resolution of the binary binary 4nc.; Ia, and registers

5 and 15 At the same time, the kohmut1Ch) p 7 lio h,:., 17 codes produce one code of the converter by, tcl 0ch: - | s the inputs of the argument (}) of the hator H to m; 1adp1im 1azr dam (by 1,1khod (M adder 6.

Such a connection will be 1) objezhepi. 1; 1 st vrtikika-li. Slina.t “Start 1” installation of the oil tank can also be:; and “Holidays” Chapter in “About counter 14, trigger 1) 22”) 5 of the vibrator 21, having set: 1 their li n zero status. The logical block of the circuit 22 is obscured; 1, the memory of the memory block 1 is switched to; -; 11 and the lock; lae: but the signal snapped in pa-B1 on the go | orator | brator 21. lia of the fourth device is set with the correct code of the image of the image; image of the horizontal horizontal and of the pa- ture of the switch on the card of the MayipaPi | ) ovapi on oryztoptalurs loggical “1.

The device is ready to receive posthpayii .ivii; a (| Orme; 1tsIp, p: e; 1stazl 1ontiy of

and in the United States of America. Cp.of.t.t., corresponding to 1) 1; to the representatives of t: (. the following signal. Unit 1 with a low yostyayuyu her in (0 (jpManii i 11 oJiOK 1 in block 2 cjiaBhepopo iroizvo..it f iaBi: e -; t each value Ko; i, a () o: ui: sggy of the sensed C; 1g pala) 1M 1th time lerncipa 4. At this, 1 () where: test; the signal being examined; and the mass output | D; Oro of the peracTiia sneaker 4. PA BI IXO. olok 2 epaiinei.nn a (} you are sipgal;) O1TII la zsroy 1kom Oslnggra 4 and .1aiaa1.1N 5a1om1,: 1Y on eic, З1, value nO -TVnaiv HitTO KOia. V; m) other cases e. Yes b, (; a 2 1: rasch1: and oyuttst ;; h: t, in block 3; pa; 5Че :: и - ерннliMe ka / kdogo iiiaccaan code () 1): 11П; aty iI. 1 | H) ciiiiia.Ti with Hod1Iz; m register code 5. ip; i vol., When the code of the code is G | esle;: hemog1; (lp jaia pain; no output: orj col.a iicincipa; and the output of block 3 of comparison 1o is; sy1ga: 1, incoming

on BTOp; Mi is an input of register 5 and Mstavliaklpiy on his own, ah 311 is the beginning of the post unasoniCi-o code. In ajivinx cases of a signal, t from a block output: i sragmsii; is absent, the ila of the output where the match maker 2 is set /;-1.) ds; D; 1; the first code is 1;} st, but.

by adding AND;) Mo1c of the register code 5 s to ;; с) literate, 1io: m code of peiaicrpa 4. This code of iOS1 is located on Vlg.1, is formed ,; 17 codes. At 11; On the way to vr giaav, tpvaets T1ravl yu1iy k (). T / 71, Kov (jpi, m, do

Hier1: a) 1th switch output 7, the last lt.vbiaet jLbi;: rat1;) a In retract; 11 to the output of cvMMaiopa 6 pa t raz.aov, sootvetstustusus. mac; K m;) okoichani zaeei Jos.; Edovatel1, and the stability of the ordinates of Issus, foredoimo (; sigpa iia B1 moves of the first and second) IjeniCTjjOB 4; 5 are set to the ratio of the minimum and maximum zalapsh code ;; into the hordes; i1at of the signal being studied, the output of the adder 12 is the difference code of these values, the output of the converter 17 of the codes is the control code corresponding to this difference code, and the outputs of the generator 8 are shifted relative to the outputs of the adder 12 so that all codes representing the difference between the values of the ordinates of the signal under study and their minimum value can be displayed on the screen of the matrix display panel. After writing to the memory 1, the value of the last ordinate of the signal under study, a single impulse arrives at the end of the recording, the positive difference of which is set by the output of counter 14 in the mode of writing the ordinate code sequence of the signal under investigation, is written to register 15. This impulse to the input of the trigger 22 and through the OR element 20 n, and the other input of the counter 14, sets the triple 22 to one, and the counter 14 to the zero state.

Logical "1 at the output of the trigger 22 switches the memory block 1 to the read mode and resolves the signals at the output of the one-oscillator 21. At the output of the register 15, a / -disk code determined by the maximum value of the signal under study on the horizontal is set. This code is fed to the input of converter 18. If the horizontal input level is set to logical I, then the output of the converter 18 of the codes is set to the control code K, which, arriving at the first input of the switch 19, shifts the inputs of the decipher 10 relative to the outputs of the counter 14 to K. bits, which corresponds to the scale of the display horizontally G: 2:

The eight-dimensional information recorded in memory block 1 is carried out by the signals of the pulse generator 13, which enters the input of the counter 14 and changes its state.

In this case, the decoder 10 sequentially switches the vertical sections of the matrix display panel 9, thereby scanning the image horizontally. At the same time, the signals of counter 14 produce sequential codes of the studied signal, stored in memory block 1, which, added to the additional code of the first register 4, in the form of the difference of the values of the codes of ordinates and the minimum code value of the ordinate of the signal studied, passes through switch 7 on The input of the power supply unit 8, defining the selection of the corresponding horizontal mud.

Since the horizontal display scale is 1; 2, then each vertical matrix display panel corresponds to the ordinate codes of the signal under study. If these codes have different values, then there will be 2 indicated points on this vertical bus, i.e., the displayed signal is blurred.

After the end of the horizontal scanning cycle, a one-shot 21 is triggered by a negative signal drop at the last output of the decider 10. The signal from the output of the one-shot 21 through the OR element 20 goes to the second input of the counter 14 and sets it to the zero state. The display of the signal under investigation, the clocks of whose ordinates are stored in memory block 1, continues until the external signal "Initial Scale Setting" is received and the ordinate codes of the signal on the input bus of the signal begin to flow.

If a logical "O" level is applied to the enable input of the scaling horizontally, then a control code is set at the output of the third converter 18, which corresponds to a 1: 1 horizontal display scale.

The operator has the ability to move the displayed signal by setting on the bus the image offset code horizontally some code -V. In this case, the ordinate codes of the signal are extracted from block 1 of the memory, starting not with the first, but with the .Vth one.

Q In the proposed device for displaying information, in contrast to the known one, automatic display of the displayed signal horizontally is not foreseen. Such scaling occurs without loss of points of the displayed

5 signals. The operator has the ability to shift the displayed signal along the X axis and observe any of his interest in the given signal on a 1: 1 scale horizontally. The application of the proposed device is advisable especially in those

cases when the operator needs to evaluate the entire signal under study at once, as well as at any time to investigate the area of interest.

Claims (1)

Invention Formula A device for displaying information comprising a memory unit, the first input of which is the first input of the device connected to the first inputs of the first and second comparison blocks and the first and second registers, the output of the memory block is connected to the first input of the first adder whose output is connected to the first the input of the first switch, the output of which is connected to the input of the first descrambler, the output of which is connected to the horizontal tires of the matrix display panel, the vertical tires of which are connected to the BIDIXOAV of the second decryptor the second input of the first adder is connected to the output of the first code converter connected to the first input of the second adder, the second. input of which is connected to the output of the second register connected to the second input of the second comparison unit, the output of which is connected to the second input of the second register, the input of the first the code converter is connected to the output of the first register connected to the second input of the first comparison unit, the output of which is connected to the second input of the first register, pulse generator, the output of which is connected to the first input of the counter, the output of which is connected to the first input of the third register, the second input of which is the second input of the device, characterized in that, in order to expand the field of application of the device by providing the possibility of scaling images in two coordinates, a third adder is entered into it , second and third code converters, second switch, element OR, one-shot and trigger, input kF This is the third input of the device connected to the first input of the OR element, the output of the trigger is connected to the second input of the memory unit and to the first input of the one-vibrator, the second input of which is connected to the corresponding output of the second depyfrater, the output of the single-vibrator is connected to the second input of the OR element, the output of which connected to the second input of the counter, the output of which is connected to the first inputs of the second switch and the third adder, the second input of which is the fourth input of the device, the output of the third adder The second input of the second switch is connected to the output of the third code converter, the first input of which is connected to the third register output, the second input of the third code converter is the fifth input of the device, the output The second adder is connected to the input of the second code converter, the output of which is connected to the second input of the first switch.