SU1120328A1 - Device for priority processing of requests - Google Patents

Abstract

A DEVICE FOR PRIORITY SERVICE OF APPLICATIONS containing a register of requisitions, a group of priority registers, a group of comparison circuits, a first group of elements AND, two elements OR, a first element AND, a counter pulse generator and a trigger, the group of information inputs of the register of a wok is a group of request inputs the devices, the information inputs of the group priority registers are a group of device code inputs, each output of the register of the order is connected to the first input of the element I of the same name of the first group, the second / inputs In the first group, the first group is connected to the outputs of the same name comparison circuits, the first inputs of which are connected to the outputs of the same priority group registers, and the second inputs are connected to the outputs of the counter, the counting input of which is connected to the output of the first element, the first input of which is connected to the output of the pulse generator, the setup input into 1 trigger is connected to the reset input of the counter and the output of the first OR element, whose input is the device start input, the device output group is connected to the input group of the second element OR, characterized in that, in order to increase the speed of the device, it contains the second group of elements AND, a group of triggers, the second element AND and the third element OR, and the inputs of the elements AND of the second group are connected to the outputs of the same elements of the first group and to the inputs the third OR element, the output of which is connected to the first input of the second element AND, the inverse inputs of the AND elements of the second group are connected to the output of the second OR element and to the second input of the second § element AND whose output is connected to the input triggers in O and flip-flop (L inverse input of the first element AND, outputs of elements AND of the second group are connected to the inputs of the installation in 1 group triggers of the same name and to the first group of inputs of the first OR element, the second group of inputs of which is the group of request inputs of the device, the response inputs of the device connected to the installation inputs in O of the corresponding group triggers, the zero outputs of which under1C are connected to the third inputs of the same 00 elements AND of the first group, and the single outputs are connected to the inputs of the second OR element and with the corresponding The current outputs of the device's output group, the single output of the trigger is connected to the second input of the first element, And the group of response inputs of the device is connected to the group of input inputs of the register reset.

Description

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The invention relates to computing technology, in particular, to devices for priority service of requests.

A priority device is known that contains a register of a wake, a priority register, a pulse generator, AND and 1-SHI elements, counters, and a control trigger l.

The disadvantages of this device the complexity of its technical implementation and, therefore, low reliability.

Closest to the invention is a device comprising a register of requisitions, a group of priority registers, a group of comparison circuits, a counter, a group of elements AND, elements AND and OR, a trigger and an L2 pulse generator.

A disadvantage of the known device is the low speed, due to the considerable time spent on the sequential polling of subscribers. This time is determined mainly by the operation of the device counter, which is started after the end of the service of the next subscriber according to the subscriber response signal.

The purpose of the invention is to increase the speed of the device by reducing the device response time to subscriber response signals.

The goal is achieved by the fact that the device for priority servicing of applications, containing a register of requisitions, a group of priority registers, a group of comparison circuits, a first group of elements AND, two elements of an IPD, a first element AND, a counter, a pulse generator, and a trigger, the information inputs of the register for the wok is a group of request inputs of the device, the information inputs of the priority registers of the group are a group of code inputs of the device, each output of the register of the wok is connected to the first input of the same name element In the first group, the second inputs of the elements of the first group are connected to the outputs of the same name comparison circuits, the first inputs of which are connected to the outputs of the same name priority registers of the group, and the second inputs are connected to the outputs of the counter, the counting input of which is connected to the output of the first element the first input of which is connected to the output of the pulse generator, the input

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1) 1 trigger is connected to the reset input of the counter and the output of the first OR element, whose input is the device start input, with the device output group connected to the input element of the second OR element, the second element group AND, the trigger group, the second element AND and the third element are entered the element OR, 10 and the inputs of the elements AND of the second group are connected to the outputs of the elements of the same name AND of the first group and to the inputs of the third element OR, the output of which is connected to the first ji; the input of the second element is And the inverse inputs of the elements of the second group are connected to the second element SH and to the second input of the second element AND, the output of which is connected 2Q to the input of the installation in O of the trigger and inverse - the input of the first element And, the outputs of the elements of the second group are connected to the inputs installations in 1 of the same name triggers of group 25 and to the first group of inputs of the first

the JM element, the second group of inputs of which is the group of device request inputs; the response inputs of the device are connected to the installation inputs in the corresponding triggers.

groups whose zero outputs are connected to TpeTbHNi: the inputs of the same elements of the AND group of the first group, and the single outputs are connected to the EXO-dyami of the second OR element, and with the corresponding outputs of the device group, the single output of the trigger is connected to the second input of the first element And, the group of response inputs The device is connected to a group of inputs for the reset register of the wok.

The drawing shows a functional diagram of the device.

The device contains a register 1 of the order, a group of comparison circuits 2, a group of priority registers 3, a counter 4, a group of elements PI 5. elements OR 6 and 7, an element AND 8. a generator 9 1shpulsov5 trigger 10, a group of elements 11 and 11, a group of trigger 12s elements OR 13 and AND 14, the request 15 and the code 16 inputs of the device, the input 17 of the start of the device, the response inputs 18 of the device and the outputs 19 of the device The device operates as follows.

The priority codes of subscribers ps code on device inputs 16 are entered into the corresponding priority registers 3 311. The highest priority corresponds to the highest of the inputs. Before the operation of the device, all the triggers 12 are in the zero state. As a result, elements of AND 5. The first group are open by the third input, elements AND 11 of the second group by the inverse input, and element AND 14 is closed by the second input with a zero signal from the output of the OR-13 element. Service requests are received through the device's request inputs 15 into the corresponding bits of register 1 of the application, the number of bits of which is equal to the number of subscribers. In addition, requests through the element IL1 6 arrive at the input of the installation in 1 of the trigger 10 and all bits of the counter 4, thereby initiating the beginning of the cycle of operation of the device. The signal from the single output of the trigger 10 opens the second input of the And 8 element, allowing the arrival of pulses from the output of the generator 9 to the counting input of the counter. As a result, the output of the counter 4 forms a decreasing sequence of binary codes of numbers starting from the maximum possible. the counter 4 with the code in some register 3 of the priority on the input of the comparison circuit 2 corresponding to this register, there is a single signal. This signal through the And 5 element opened by the nepBONry input by the signal from the corresponding register register 1 bit for the wok that captured the request from the subscriber arrives at the inputs of the OR 7 element and the corresponding AND 11 element of the second group. From the output of element RSHI 7, the signal arrives at the first input of element I 14, which is closed at the second input by the zero signal, from the output of element OR 13. And elements 11 are open at the second input, therefore the signal from the output of element 5 passes through the element IM sets the corresponding trigger 12 to one state, as well as through the OR element 6, goes to the installation inputs to 1 flip-flop 10 and counter 4. The single signal from the single output of flip-flop 12 goes to output 19 of the device, initiating the service of the corresponding subscriber. The same signal is fed to the input of the element OR 13, the signal from the output of which closes all the AND 11 elements of the second group at the inverse input. This eliminates the installation in one state of the other triggers 12 before the end of the service of the subscriber. Zero signal from the zero output of the trigger 12, corresponding to the subscriber supplied for servicing; closes on the third entrance the corresponding lean element AND 5 of the first group. Thereby, the interrogation of this subscriber in all subsequent cycles of the device operation before the end of its service is excluded. The signal from the output of the element OR 6 initiates the enie one cycle of the device operation, in which the next priority request from the service queue is determined. The duration of this signal is determined by the time delays on the logic elements and the trigger 12 and is sufficient to set the trigger 10 to one state and all bits of counter 4. At the counter 4, the decreasing sequence of number codes starts again, starting from the maximum possible. When the code at the outputs of the counter 4 coincides with the code in any priority register 3, a single signal is generated at the output of the corresponding comparison circuit 2. If there is a request in the corresponding bit of register 1 of the order, and also provided that the corresponding trigger 12 is in the zero state, this signal through the element And 5 of the first group enters the first input of the element 11 of the second group. Since all elements And 11 are closed on the inverse input, the signal to the input of the installation in 1 trigger 12 is not received. From the output of the element AND 5 a single signal through the element OR 7 also goes to the first input of the element AND 14. In this cycle of operation of the device, the element 14 is open at the second input with a single signal from the output of the element RSHI 13. Therefore, at the output of the element 14, there appears a single a signal that sets the trigger 10 to the zero state and closes the element AND 8 at the inverse. As a result, the flow of signals from the output of the generator 9 to the counting input of the counter 4 of the device is stopped. Thus, at the output of the And 5 element of the first group, corresponding to the highest priority in the queue, a single signal is constantly present. After the end of the next subscriber service, the response signal on input 18 of the device sets to the zero state the corresponding register bit 1 for the wok and the trigger. With a zero signal from the output of the OR 13 element, all AND 11 elements of the second group are opened by the inverse input. The signal from the output of the AND 5 element through the AND 11 element sets the corresponding trigger 12 to the one state. Thus, the high priority priority from the queue is put into service. At the same time, a single signal from the output of the element AND 11 through the element OR 6 is fed to the input of the installation in a single state of the counter 4 and the trigger 10, i.e. The next cycle of operation of the device is initiated, allowing the user to select the next in priority for the serviced one from the queue. Similar device operation cycles are launched each time when the system enters the request inputs 15. In addition, the subscriber priority codes can be changed in each operation cycle of the device. In this case, the operation cycle of the device for detecting the highest priority application from the queue must be initiated by a signal at the device start input 17. The application of the invention improves the speed of the device by reducing the response time of the device to service termination signals.

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Claims (1)

^ 54) DEVICE FOR PRIORITY SERVICE OF APPLICATIONS, containing the application register, group of priority registers, group of comparison schemes, first group of AND elements, two OR elements, first AND element, counter _g pulse generator and trigger, and the group of information inputs of the application register is a group of request device inputs, information inputs of group priority registers are a group of device code inputs, each output of the application register is connected to the first input of the element of the same name And the first group, the second < ntov And the first group are connected to the outputs of the same name comparison schemes of the group, the first inputs of which. ryh are connected to the outputs of the same priority registers of the group, and the second inputs are connected to the outputs of the counter, the counting input of which is connected to the output of the first element And, the first input of which is connected to the output of the pulse generator, the input of the 1 trigger setting is connected to the counter reset input and the output of the first element OR, the input of which is the start-up input of the device, the group of device outputs is connected to the group of inputs of the second OR element, characterized in that, in order to improve the speed of the device, it contains the second UPU of AND elements, a group of triggers, a second AND element, and a third OR element, and the inputs of AND elements of the second group are connected to the outputs of the same elements AND of the first group and to the inputs of the third OR element, the output of which is connected to the first input of the second AND element, inverse inputs of the AND elements of the second group are connected to the output of the second OR element and to the second input of the second AND element, the output of which is connected to the “setting input 0” of the trigger and the inverse input of the first AND element, the outputs of the elements of the second group are connected to the inputs insertions into 1 group triggers of the same name and to the first group of inputs of the first OR element, the second group of inputs of which is the group of request inputs of the device, the response inputs of the device are connected to the installation inputs at 0 of the corresponding triggers of the group, the zero outputs of which are connected to the third inputs of the same elements AND of the first group and the unit outputs are connected to the inputs of the second OR element and to the corresponding outputs of the group of device outputs, the trigger single output is connected to the second input of the first AND element, the group of etnyh input device connected to the group input register reset requests.