SU1086552A1 - Device for forming difference frequency signal of pulse trains - Google Patents

Abstract

A DEVICE FOR THE FORMATION OF A DIFFERENTIAL FREQUENCY SIGNAL OF A PULSE SEQUENCE, containing five triggers — and a clock generator, the output of which is connected to the synchronization inputs of the first and second triggers, the information inputs of which are connected to the outputs of the third and fourth triggers, respectively, information inputs of which are connected to the outputs of the third and fourth triggers, respectively, which inputs each have their inputs connected to the outputs of the third and fourth triggers. different devices; so that, in order to increase the accuracy of the formation of the difference frequency of the pulse sequences, a delay element, two AND elements, two NOT elements, the first one, and the second modulo-two adders, the first inputs KOTOEftjx are connected to the outputs of the first and second triggers, and the second inputs - with the outputs of the fourth and third flip-flops, respectively, the synchronization inputs of which are connected to the output of the clock pulse generator and through the delay element to the first inputs of the AND elements, while the second input of the first I. element is connected to output of the first adder modulo two and through the first element NOT with the second input of the second element I, the third input of which is connected to the output of the second adder by two and through the second element with NOT to the third input of the first element AND whose output is connected to the first the input of the fifth trigger, the second input of which is connected to the output of the second element And; output - to the output bus device. about X) 5b: l Lt / U1 ND

Description

The invention relates to italian technology and can be used in discrete and digital systems, in particular in frequency discriminators. A device for generating a differential-frequency signal containing an amplifier, a limiter and a mixer, such as a triggered balance modulator 1, is known. However, this device uses MOs only at frequencies of input signals close to each other and does not allow the presence of noise signals. The technical essence of the invention is a device for forming a difference frequency of pulse sequences, containing five triggers and a clock pulse generator, the output of which is connected to a terminal. and synchronization of the first and second triggers, whose informative inputs are connected to the outputs of the third and fourth triggers, respectively, the information inputs of which are connected respectively to the first and second outputs of the fifth trigger, the first input of which is connected to the first bus and the third trigger input, the setup input to the zero state of which is connected to the first output of the first trigger, the second output of which is connected to the first output bus, while the second input of the fifth trigger is connected to the second in one bus and with the input. the sync of the fourth trigger, the zero-state setup input of which is connected to the first output of the second trigger, the second output of which is connected to the second output bus 2j. A disadvantage of the known device is the low accuracy of generating the difference frequency of pulse sequences when they are present. input signals due to the impossibility of recognizing impulse noise. The purpose of the invention is to improve the accuracy of forming the difference frequency of the pulse sequences. The goal is achieved by the fact that the device generates a differential frequency signal of pulse sequences, contains five triggers and a clock pulse generator, the output of which is connected to the synchronization inputs of the first and second triggers, whose information inputs are connected to the outputs of the third and fourth triggers, respectively, information inputs which are connected to the input buses of the device, a delay element, two elements AND, two elements NOT, the first and second modulo two, the first the inputs of which are connected to the outputs of the first and second flip-flops, and the second - with the outputs of the fourth and third flip-flops, respectively, the synchronization inputs of which are connected to the generator output, clock pulses and through the delay element to the first inputs of the AND elements, while the second input of the first And element with the output of the first modulo-two adder and through the first element is NOT with the second input of the second element AND, the third input of which is connected to the output of the second adder via module two and through the second element to the third input of the first of gate AND, whose output is connected to the first input of the fifth flip-flop, a second input connected to the output of the second AND gate, and an output - to the output bus Devices. FIG. 1 shows a functional diagram of the proposed device; in fig. 2 and 3 are time diagrams, according to his work. A device for generating sig: | Nala differential frequency pulse sequences. Contains five triggers 1-5 and, clock generator 6, the output of which is connected to the synchronization inputs of the first and second triggers 1 and 2, the information inputs of which are connected to the outputs of the third and fourth triggers 3 and 4, respectively, the information inputs of which are connected to the input buses of the device, as well as the delay element 7, two elements AND 8 and 9, two elements NOT 10 and 11, the first and second modulators two and 12 and 13, the first inputs of which connected to the outputs of the first and second triggers 1 and 2, and the second - with the outputs of the four. and the third flip-flops 4 and 3, respectively, the synchronization inputs of which are connected to the output of the clock pulse generator 6 and through the delay element to the first inputs of the AND elements 8 and 9. In this case the second input of the first element I 8 is connected to the output of the first adder to the p module two 12 and through the first element NOT 10 with the second input of the second element H 9, the third input of which is connected to the output of the second modulo two 13 and through the second element of NOT 11 to the TpeTbeiMy input of the first element And 8, the output of which is connected to the first input of n addition trigger 5, second in od of which is connected to the output of the second AND gate 9, and the trick output device bus. The device works as follows. The two input signals are memorized using triggers 3 and 1, 4 and 2. Signals 1 and O are received at the information inputs of D-triggers 3 and 4, and the triggers 1 and 2 work similarly to the synchronization inputs. Each From the flip-flops, it remembers the signal values for the period of the clock pulses. The adders 12 and 13 modulo two of the first input signal, determined at the time of memorization, with the second signal, determined at the time of memorization +1, If at the same time single signal levels are obtained, then they are. are replaced with zero levels by means of elements AND 8 and 9, to the other inputs of which prohibitory signals are transmitted co-sphastly from the terrifiers 13 and 12 through the elements 11 and 10, to eliminate the influence of transients during switchings of B-triggers, elements are clocked impulses from generator b, delayed by the delay element 7 for a period of time less than the period of clock pulses. The signals from the outputs of the elements And set the trigger 5 to position 1 or O, forming the signal of the difference frequency.

A timing diagram (FIG. 2) depicts the conversion of input signals leading to the generation of a differential frequency signal. I On the D-flip-flops, the values of the rectangular input signals are stored at the times corresponding to the sequence of clock pulses - the signal b. The error in the phase of the signal resulting from this sampling operation can be limited to the required small value, increasing the frequency of clock pulses. Signal strengths need to be reset for at least one period of clock pulses. In the device diagram (Fig. 1), the memorization time of signal values is equal to two periods of clock pulses. The modulo summation of the two-time and opposite values of the input signals, which are fixed when they are memorized at time i, +1, is explained in FIG. 2 arrows: the values of the signals 1 or 0, determined at times, corresponding to the beginning and end of the arrow, are summed up. The resulting total signals 1 and g are shown above) the original signals.

further, after exclusion from the two sum signals of those sections. On which the signals simultaneously accept the values 1, two signals e and K are obtained.

Finally, the front and slice of the difference frequency signal are formed (signal 1 at the moments when the signals e and, take on single values, respectively.

The proof of the fact that this sequence of operations really leads to the formation of a difference frequency signal is based on an analysis of three possible cases of the relative position of the fronts and cuts of the input signals a and 5 (Fig. 2). In the first case (left), the front of the second signal lags behind the front of the first signal, which determines the unit values of the first sum signal and the zero values of the second sum signal. In the second light (right), on the contrary, the front of the first signal is lagging behind the froste of the second signal, which accordingly determines the zero values of the first sum signal and the unit values of the second. The third case — the solid coincidence of the edges (cuts) of the signals does not allow obtaining single values of the first or second sum signals, which is necessary for generating a signal of different frequency. However, due to the inequality of the frequencies of the input signals, the first or second cases considered immediately follow the third case. Since the differential frequency signal should be viewed from the physical side, as a result of the beating of two input signals, when the fronts (of one signal outrun the fronts (cuts) of another signal, it becomes obvious that the operations of this algorithm that fix changes in the mutual position of the fronts (cuts), to the formation of a differential frequency signal.

According to FIG. 2, the input signals a, S are close in frequency, and in shape are meanders, i.e. square, pulses with a duty cycle of two. The output of the difference frequency is also generated in the form of a meander. This kind of signals is taken only for impliedness. However, this algorithm is fully applicable to a wider class of signals, in particular, to input signals with an arbitrary ratio of frequencies, to non-periodic signals, to signals with different and variable duty cycle j of a mixture of signals with noise. The application of the algorithm to some of the listed signals is considered in FIG. 3. The only requirement for signals is the need to satisfy the inequality / t i g dd® T the shortest time interval between state changes 1 (O) of the input signal; f is the frequency of storing the input signal values. This condition is similar in form and physical meaning to the well-known theorem of V. A. Kotel'nikov concerning discretization of signals with a limited spectrum. The description of the device proposed should also be applied in two extreme cases of input signals. If the frequency of one of the signals is zero, then the modulo summing operation of two variable values of one of the signals with a constant value results in a signal with the frequency of the input signal. If the frequencies of the input signals are equal, the signals differ from each other only in phase. In this case, after summing up their values and excluding from the total signals of simultaneously appearing single plots, we get two signals, of which only one takes both single and zero values, while the second is zero everywhere. Therefore, the difference frequency is also zero. The sign of the frequency difference between two input signals can be determined by splitting one of the input signals in phase, that is; converting two pairs of signallob. It is known that if the frequency of the input signal split in phase is greater than the frequency of the second (unsplit) signal, then for the difference frequency signal not only the magnitude but also the sign of the phase shift is preserved. If the frequency of the splittable signal is smaller, then the sign of the phase shift is reversed.

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Claims (1)

DEVICE FOR FORMING A DIFFERENCE FREQUENCY SIGNAL OF A PULSE SEQUENCE, containing five triggers and a clock generator, the output of which is connected to the synchronization inputs of the first and second triggers, the information _g inputs of which are connected to the outputs of the third and fourth triggers, respectively, the information inputs of which are connected to different devices. in order to increase the accuracy of forming the difference frequency of the pulse sequences, a delay element is introduced into it, two elements Й, two elements NOT, the first and second adders modulo two, • the first inputs of which are connected to the outputs of the first and second triggers, and the second inputs - with the outputs of the fourth and third triggers, respectively, the synchronization inputs of which are connected to the output of the clock generator and through the element. delays to the first inputs of the elements And, at the same time, the second input of the first element I. is connected to the output of the first adder modulo two and through the first element NOT to the second input of the second <element II, the third input of which ι is connected to the output of the second adder ΓΛ modulo two and through the second element 3 "" NOT to the third input of the first element And, the output of which is connected to the first input of the fifth trigger, the second 2 input of which is connected to the output ** of the second element And,; output - to the device output bus. I yuta