SK391392A3 - Storage cell - Google Patents

Storage cell Download PDF

Info

Publication number
SK391392A3
SK391392A3 SK3913-92A SK391392A SK391392A3 SK 391392 A3 SK391392 A3 SK 391392A3 SK 391392 A SK391392 A SK 391392A SK 391392 A3 SK391392 A3 SK 391392A3
Authority
SK
Slovakia
Prior art keywords
negative
positive
voltage
cell
low
Prior art date
Application number
SK3913-92A
Other languages
English (en)
Slovak (sk)
Inventor
Lars Gunnar Carlstedt
Original Assignee
Carlstedt Elektronik Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Carlstedt Elektronik Ab filed Critical Carlstedt Elektronik Ab
Publication of SK391392A3 publication Critical patent/SK391392A3/sk

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/31Programming languages or programming paradigms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/30Creation or generation of source code
    • G06F8/31Programming languages or programming paradigms
    • G06F8/311Functional or applicative languages; Rewrite languages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Devices For Executing Special Programs (AREA)
  • Stored Programmes (AREA)
  • Static Random-Access Memory (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
  • Saccharide Compounds (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Advance Control (AREA)
  • Vehicle Body Suspensions (AREA)
  • Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
  • Paper (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Monitoring And Testing Of Nuclear Reactors (AREA)
  • Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Semiconductor Memories (AREA)
SK3913-92A 1990-08-02 1991-08-01 Storage cell SK391392A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9002558A SE9002558D0 (sv) 1990-08-02 1990-08-02 Processor
PCT/SE1991/000512 WO1992002933A1 (en) 1990-08-02 1991-08-01 Bit storage cell

Publications (1)

Publication Number Publication Date
SK391392A3 true SK391392A3 (en) 1994-06-08

Family

ID=20380081

Family Applications (2)

Application Number Title Priority Date Filing Date
SK3913-92A SK391392A3 (en) 1990-08-02 1991-08-01 Storage cell
SK402592A SK402592A3 (en) 1990-08-02 1991-08-01 Reducing processor

Family Applications After (1)

Application Number Title Priority Date Filing Date
SK402592A SK402592A3 (en) 1990-08-02 1991-08-01 Reducing processor

Country Status (23)

Country Link
US (6) US5379387A (de)
EP (6) EP0541685B1 (de)
JP (6) JPH05508725A (de)
KR (1) KR930701818A (de)
CN (6) CN1059413A (de)
AT (5) ATE118640T1 (de)
AU (6) AU8333191A (de)
BG (3) BG97381A (de)
CA (6) CA2087023A1 (de)
DE (5) DE69101640T2 (de)
ES (3) ES2056655T3 (de)
FI (3) FI930434A (de)
HU (3) HUT63710A (de)
IL (6) IL99053A0 (de)
LT (6) LTIP382A (de)
NO (3) NO930301L (de)
NZ (3) NZ239242A (de)
RO (1) RO109487B1 (de)
SE (1) SE9002558D0 (de)
SK (2) SK391392A3 (de)
TW (5) TW215960B (de)
WO (6) WO1992002874A1 (de)
ZA (6) ZA916121B (de)

Families Citing this family (117)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993024888A1 (en) * 1992-05-22 1993-12-09 Massachusetts Institute Of Technology Response resolver for associative memories and parallel processors
JP3376604B2 (ja) * 1992-07-20 2003-02-10 カシオ計算機株式会社 情報管理装置
IT1270230B (it) 1994-06-16 1997-04-29 Enichem Sintesi Composizione catalitica e processo per l'alchilazione di composti aromatici
US5619711A (en) * 1994-06-29 1997-04-08 Motorola, Inc. Method and data processing system for arbitrary precision on numbers
GB2293468B (en) * 1994-09-21 1999-09-29 Sony Uk Ltd Data processing systems
JP3037089B2 (ja) * 1994-12-14 2000-04-24 川崎製鉄株式会社 連想メモリ
FR2736737B1 (fr) * 1995-07-12 1997-08-14 Alcatel Nv Dispositif de gestion de relations entre des objets
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
US6103579A (en) * 1996-01-31 2000-08-15 Micron Technology, Inc. Method of isolating a SRAM cell
US6750107B1 (en) * 1996-01-31 2004-06-15 Micron Technology, Inc. Method and apparatus for isolating a SRAM cell
US5964825A (en) * 1996-02-09 1999-10-12 Texas Instruments Incorporated Manipulation of boolean values and conditional operation in a microprocessor
US5706224A (en) * 1996-10-10 1998-01-06 Quality Semiconductor, Inc. Content addressable memory and random access memory partition circuit
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
US6338106B1 (en) 1996-12-20 2002-01-08 Pact Gmbh I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
ATE243390T1 (de) 1996-12-27 2003-07-15 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen umladen von datenflussprozessoren (dfps) sowie bausteinen mit zwei- oder mehrdimensionalen programmierbaren zellstrukturen (fpgas, dpgas, o.dgl.)
DE19654846A1 (de) 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
US6374346B1 (en) 1997-01-24 2002-04-16 Texas Instruments Incorporated Processor with conditional execution of every instruction
DE19704044A1 (de) * 1997-02-04 1998-08-13 Pact Inf Tech Gmbh Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704728A1 (de) 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
DE19704742A1 (de) 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
DE59802537D1 (de) * 1997-04-15 2002-01-31 Gmd Gmbh Frei programmierbares, universelles parallel-rechnersystem zur durchführung von allgemeinen berechnungen
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
US5943492A (en) * 1997-12-05 1999-08-24 Digital Equipment Corporation Apparatus and method for generating external interface signals in a microprocessor
DE19861088A1 (de) 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
DE19807872A1 (de) 1998-02-25 1999-08-26 Pact Inf Tech Gmbh Verfahren zur Verwaltung von Konfigurationsdaten in Datenflußprozessoren sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstruktur (FPGAs, DPGAs, o. dgl.
US6236585B1 (en) * 1998-05-13 2001-05-22 Texas Instruments Incorporated Dynamic, data-precharged, variable-entry-length, content addressable memory circuit architecture with multiple transistor threshold voltage extensions
WO2002013000A2 (de) 2000-06-13 2002-02-14 Pact Informationstechnologie Gmbh Pipeline ct-protokolle und -kommunikation
DE10081643D2 (de) * 1999-06-10 2002-05-29 Pact Inf Tech Gmbh Sequenz-Partitionierung auf Zellstrukturen
US6097651A (en) * 1999-06-30 2000-08-01 Quicklogic Corporation Precharge circuitry in RAM circuit
SE516171C2 (sv) * 1999-07-21 2001-11-26 Ericsson Telefon Ab L M Processorarkitektur anpassas för programspråk med sekventiellt instruktionsflöde
US6799243B1 (en) 2000-06-14 2004-09-28 Netlogic Microsystems, Inc. Method and apparatus for detecting a match in an intra-row configurable cam system
US6813680B1 (en) 2000-06-14 2004-11-02 Netlogic Microsystems, Inc. Method and apparatus for loading comparand data into a content addressable memory system
US6751701B1 (en) 2000-06-14 2004-06-15 Netlogic Microsystems, Inc. Method and apparatus for detecting a multiple match in an intra-row configurable CAM system
US6542391B2 (en) * 2000-06-08 2003-04-01 Netlogic Microsystems, Inc. Content addressable memory with configurable class-based storage partition
US6934795B2 (en) * 1999-09-23 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with programmable word width and programmable priority
US6944709B2 (en) * 1999-09-23 2005-09-13 Netlogic Microsystems, Inc. Content addressable memory with block-programmable mask write mode, word width and priority
US6801981B1 (en) 2000-06-14 2004-10-05 Netlogic Microsystems, Inc. Intra-row configurability of content addressable memory
EP1107107A1 (de) * 1999-12-10 2001-06-13 Koninklijke Philips Electronics N.V. Parallele Datenverarbeitung und Mischung
AU774704B2 (en) * 2000-01-13 2004-07-08 Yutaka Yasukura Electronic information inquiring method
US6560670B1 (en) 2000-06-14 2003-05-06 Netlogic Microsystems, Inc. Inter-row configurability of content addressable memory
US6246601B1 (en) * 2000-06-14 2001-06-12 Netlogic Microsystems, Inc. Method and apparatus for using an inter-row configurable content addressable memory
US6963882B1 (en) * 2000-10-02 2005-11-08 International Business Machines Corporation Method and apparatus for processing a list structure
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
KR100413384B1 (ko) * 2000-10-24 2004-01-03 주식회사 삼양제넥스 옥피로부터 수용성 식이섬유의 제조 방법
GB2370380B (en) * 2000-12-19 2003-12-31 Picochip Designs Ltd Processor architecture
US6990555B2 (en) * 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
WO2005045692A2 (en) 2003-08-28 2005-05-19 Pact Xpp Technologies Ag Data processing device and method
US6925457B2 (en) * 2001-07-27 2005-08-02 Metatomix, Inc. Methods and apparatus for querying a relational data store using schema-less queries
US7302440B2 (en) * 2001-07-27 2007-11-27 Metatomix, Inc. Methods and apparatus for statistical data analysis and reduction for an enterprise application
US7890517B2 (en) * 2001-05-15 2011-02-15 Metatomix, Inc. Appliance for enterprise information integration and enterprise resource interoperability platform and methods
US7058637B2 (en) * 2001-05-15 2006-06-06 Metatomix, Inc. Methods and apparatus for enterprise application integration
US6856992B2 (en) * 2001-05-15 2005-02-15 Metatomix, Inc. Methods and apparatus for real-time business visibility using persistent schema-less data storage
US8572059B2 (en) * 2001-05-15 2013-10-29 Colin P. Britton Surveillance, monitoring and real-time events platform
US20030208499A1 (en) * 2002-05-03 2003-11-06 David Bigwood Methods and apparatus for visualizing relationships among triples of resource description framework (RDF) data sets
EP1402382B1 (de) 2001-06-20 2010-08-18 Richter, Thomas Verfahren zur bearbeitung von daten
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
EP1483682A2 (de) 2002-01-19 2004-12-08 PACT XPP Technologies AG Reconfigurierbarer prozessor
AU2003214003A1 (en) 2002-02-18 2003-09-09 Pact Xpp Technologies Ag Bus systems and method for reconfiguration
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2004021176A2 (de) 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003289844A1 (en) 2002-09-06 2004-05-13 Pact Xpp Technologies Ag Reconfigurable sequencer structure
WO2004034625A2 (en) * 2002-10-07 2004-04-22 Metatomix, Inc. Methods and apparatus for identifying related nodes in a directed graph having named arcs
US7017017B2 (en) * 2002-11-08 2006-03-21 Intel Corporation Memory controllers with interleaved mirrored memory modes
US7130229B2 (en) 2002-11-08 2006-10-31 Intel Corporation Interleaved mirrored memory systems
DE102004013180A1 (de) * 2004-03-17 2005-10-06 Giesecke & Devrient Gmbh Speicherbereinigung (Garbage Collection) für Smart Cards
US7665063B1 (en) 2004-05-26 2010-02-16 Pegasystems, Inc. Integration of declarative rule-based processing with procedural programming
US8335704B2 (en) * 2005-01-28 2012-12-18 Pegasystems Inc. Methods and apparatus for work management and routing
US7570503B1 (en) 2005-05-20 2009-08-04 Netlogic Microsystems, Inc. Ternary content addressable memory (TCAM) cells with low signal line numbers
JP2009524134A (ja) 2006-01-18 2009-06-25 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト ハードウェア定義方法
US8924335B1 (en) 2006-03-30 2014-12-30 Pegasystems Inc. Rule-based user interface conformance methods
US20090132232A1 (en) * 2006-03-30 2009-05-21 Pegasystems Inc. Methods and apparatus for implementing multilingual software applications
US7827451B2 (en) * 2006-05-24 2010-11-02 International Business Machines Corporation Method, system and program product for establishing decimal floating point operands for facilitating testing of decimal floating point instructions
US8250525B2 (en) 2007-03-02 2012-08-21 Pegasystems Inc. Proactive performance management for multi-user enterprise software systems
US7697444B2 (en) * 2007-09-07 2010-04-13 Fujitsu Limited Testing a circuit using a shared bandwidth test bus
GB2454865B (en) 2007-11-05 2012-06-13 Picochip Designs Ltd Power control
JP4529098B2 (ja) * 2008-07-29 2010-08-25 ソニー株式会社 演算処理装置および方法、並びにプログラム
US10481878B2 (en) * 2008-10-09 2019-11-19 Objectstore, Inc. User interface apparatus and methods
US8843435B1 (en) 2009-03-12 2014-09-23 Pegasystems Inc. Techniques for dynamic data processing
US8468492B1 (en) 2009-03-30 2013-06-18 Pegasystems, Inc. System and method for creation and modification of software applications
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
US8666720B2 (en) * 2009-08-04 2014-03-04 Henry Chung-herng Chang Software extensions to a high level description language simulator to provide infrastructure for analog, mixed-signal, RF modeling and verification
GB2474071B (en) 2009-10-05 2013-08-07 Picochip Designs Ltd Femtocell base station
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
US8880487B1 (en) 2011-02-18 2014-11-04 Pegasystems Inc. Systems and methods for distributed rules processing
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2491098B (en) 2011-05-16 2015-05-20 Intel Corp Accessing a base station
US9195936B1 (en) 2011-12-30 2015-11-24 Pegasystems Inc. System and method for updating or modifying an application without manual coding
JP2013242700A (ja) * 2012-05-21 2013-12-05 Internatl Business Mach Corp <Ibm> コード最適化方法、プログラム及びシステム
US11150721B2 (en) * 2012-11-07 2021-10-19 Nvidia Corporation Providing hints to an execution unit to prepare for predicted subsequent arithmetic operations
US9519804B2 (en) * 2013-02-05 2016-12-13 Hackproof Technologies, Inc. Domain-specific hardwired symbolic machine that validates and maps a symbol
US10303881B2 (en) 2013-02-05 2019-05-28 Hackproof Technologies Inc. Soft-wired radio (SWR) web machine
KR102063856B1 (ko) * 2014-07-30 2020-01-08 모비디어스 리미티드 명령어 사전인출을 위한 방법 및 장치
US10469396B2 (en) 2014-10-10 2019-11-05 Pegasystems, Inc. Event processing with enhanced throughput
WO2017066427A1 (en) 2015-10-13 2017-04-20 Hackproof Technologies, Inc. Soft-wired radio (swr) web machine
US10698599B2 (en) 2016-06-03 2020-06-30 Pegasystems, Inc. Connecting graphical shapes using gestures
US10698647B2 (en) 2016-07-11 2020-06-30 Pegasystems Inc. Selective sharing for collaborative application usage
KR102092263B1 (ko) * 2016-07-17 2020-03-24 쥐에스아이 테크놀로지 인코포레이티드 일정한 처리 시간 내에 k개의 극값을 찾는 방법
KR102467698B1 (ko) * 2016-07-26 2022-11-16 삼성전자주식회사 적층형 메모리 장치, 이를 포함하는 시스템 및 그 동작 방법
US10956572B2 (en) 2016-08-22 2021-03-23 Hackproof Technologies Inc. Domain-specific hardwired web browser machine
GB2562520A (en) * 2017-05-17 2018-11-21 John Hamlin Derrick Digital processing connectivity
US10514914B2 (en) * 2017-08-29 2019-12-24 Gsi Technology Inc. Method for min-max computation in associative memory
US11048488B2 (en) 2018-08-14 2021-06-29 Pegasystems, Inc. Software code optimizer and method
CN110690991B (zh) * 2019-09-10 2021-03-19 无锡江南计算技术研究所 一种基于逻辑树的无阻塞网络归约计算装置、方法
US11567945B1 (en) 2020-08-27 2023-01-31 Pegasystems Inc. Customized digital content generation systems and methods

Family Cites Families (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL272844A (de) * 1960-12-22
US3253265A (en) * 1961-12-29 1966-05-24 Ibm Associative memory ordered retrieval
DE1921577B2 (de) * 1969-04-28 1972-04-06 Nixdorf Computer Ag, 4790 Paderborn Trommelartige vorrichtung zn buchungs- und schreibautomaten mit greifeinrichtung zum erfassen und einziehen von kontokarten o dgl
SE374973B (de) * 1970-02-17 1975-03-24 Western Electric Co
US3610967A (en) * 1970-02-27 1971-10-05 Ibm Integrated memory cell circuit
US3634833A (en) * 1970-03-12 1972-01-11 Texas Instruments Inc Associative memory circuit
US4503511A (en) * 1971-08-31 1985-03-05 Texas Instruments Incorporated Computing system with multifunctional arithmetic logic unit in single integrated circuit
US3878513A (en) * 1972-02-08 1975-04-15 Burroughs Corp Data processing method and apparatus using occupancy indications to reserve storage space for a stack
US3953866A (en) * 1974-05-10 1976-04-27 Signetics Corporation Cross coupled semiconductor memory cell
DE2460150C2 (de) * 1974-12-19 1984-07-12 Ibm Deutschland Gmbh, 7000 Stuttgart Monolitisch integrierbare Speicheranordnung
GB1540299A (en) * 1975-02-15 1979-02-07 Mathematik Datenverarbeitung G Computer employing reduction language
FR2337398A1 (fr) * 1975-12-30 1977-07-29 Ibm France Dispositif d'ecriture rapide pour cellules de memoire
DE3105503A1 (de) * 1981-02-14 1982-09-02 Brown, Boveri & Cie Ag, 6800 Mannheim Assoziativer zugriffsspeicher
EP0069525B1 (de) * 1981-06-30 1986-04-16 Fujitsu Limited Datenverarbeitungssystem
US4502118A (en) * 1981-07-07 1985-02-26 Burroughs Corporation Concurrent network of reduction processors for executing programs stored as treelike graphs employing variable-free applicative language codes
US4447875A (en) * 1981-07-07 1984-05-08 Burroughs Corporation Reduction processor for executing programs stored as treelike graphs employing variable-free applicative language codes
JPS58147889A (ja) * 1982-02-26 1983-09-02 Mitsubishi Electric Corp 半導体装置
US4709327A (en) * 1983-05-31 1987-11-24 Hillis W Daniel Parallel processor/memory circuit
DE3335423A1 (de) * 1983-09-29 1985-04-04 Siemens AG, 1000 Berlin und 8000 München Schaltung zur spannungsvervielfachung
US4644464A (en) * 1984-06-05 1987-02-17 Burroughs Corporation Graph manager for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4615003A (en) * 1984-06-05 1986-09-30 Burroughs Corporation Condition concentrator and control store for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4654780A (en) * 1984-06-05 1987-03-31 Burroughs Corporation Parallel register transfer mechanism for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4785393A (en) * 1984-07-09 1988-11-15 Advanced Micro Devices, Inc. 32-Bit extended function arithmetic-logic unit on a single chip
US4734848A (en) * 1984-07-17 1988-03-29 Hitachi, Ltd. Combination reduction processing method and apparatus
JPS61107596A (ja) * 1984-10-31 1986-05-26 Nec Corp 連想記憶装置
US4598361A (en) * 1985-01-11 1986-07-01 Burroughs Corporation Allocator for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4616315A (en) * 1985-01-11 1986-10-07 Burroughs Corporation System memory for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US5173872A (en) * 1985-06-13 1992-12-22 Intel Corporation Content addressable memory for microprocessor system
US5021945A (en) * 1985-10-31 1991-06-04 Mcc Development, Ltd. Parallel processor system for processing natural concurrencies and method therefor
US4847755A (en) * 1985-10-31 1989-07-11 Mcc Development, Ltd. Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies
US4777622A (en) * 1985-11-26 1988-10-11 Max-Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. Associative data storage system
JPS62134890A (ja) * 1985-12-05 1987-06-17 Matsushita Electric Ind Co Ltd 半導体記憶装置
EP0227348A3 (de) * 1985-12-11 1991-09-25 Advanced Micro Devices, Inc. Inhaltsadressierbare Speicherschaltung und Verfahren
JPH0810553B2 (ja) * 1986-06-13 1996-01-31 松下電器産業株式会社 記憶回路
GB2211638A (en) * 1987-10-27 1989-07-05 Ibm Simd array processor
US4922413A (en) * 1987-03-24 1990-05-01 Center For Innovative Technology Method for concurrent execution of primitive operations by dynamically assigning operations based upon computational marked graph and availability of data
GB8718056D0 (en) * 1987-07-30 1987-09-03 Int Computers Ltd Data processing system
JPH01223697A (ja) * 1988-03-01 1989-09-06 Mitsubishi Electric Corp 内容番地付け記憶装置
US4890260A (en) * 1988-05-11 1989-12-26 Advanced Micro Devices Content addressable memory array with maskable and resettable bits
US4928260A (en) * 1988-05-11 1990-05-22 Advanced Micro Devices, Inc. Content addressable memory array with priority encoder
US5099450A (en) * 1988-09-22 1992-03-24 Syracuse University Computer for reducing lambda calculus expressions employing variable containing applicative language code
JPH02187993A (ja) * 1989-01-13 1990-07-24 Mitsubishi Electric Corp 連想メモリ装置
GB8901924D0 (en) * 1989-01-28 1989-03-15 Int Computers Ltd Data processing system
KR910009445B1 (ko) * 1989-02-02 1991-11-16 정호선 신경회로망을 이용한 연상메모리(Associative memory)
US5072422A (en) * 1989-05-15 1991-12-10 E-Systems, Inc. Content-addressed memory system with word cells having select and match bits
US5175843A (en) * 1989-10-30 1992-12-29 General Electric Company Computer-aided design method for restructuring computational networks to minimize shimming delays
US5201056A (en) * 1990-05-02 1993-04-06 Motorola, Inc. RISC microprocessor architecture with multi-bit tag extended instructions for selectively attaching tag from either instruction or input data to arithmetic operation output
US5014195A (en) * 1990-05-10 1991-05-07 Digital Equipment Corporation, Inc. Configurable set associative cache with decoded data element enable lines

Also Published As

Publication number Publication date
SK402592A3 (en) 1993-09-09
DE69101242T2 (de) 1994-06-01
AU8331691A (en) 1992-03-02
CN1061865A (zh) 1992-06-10
TW199213B (de) 1993-02-01
NO930301L (no) 1993-03-23
US5379387A (en) 1995-01-03
JPH05508722A (ja) 1993-12-02
BG97381A (bg) 1993-12-24
IL99056A (en) 1994-11-11
EP0541685B1 (de) 1995-02-15
DE69101640D1 (de) 1994-05-11
IL99052A0 (en) 1992-07-15
JPH05508730A (ja) 1993-12-02
ATE105952T1 (de) 1994-06-15
AU654149B2 (en) 1994-10-27
CN1059413A (zh) 1992-03-11
CA2088577A1 (en) 1992-02-03
SE9002558D0 (sv) 1990-08-02
BG97385A (bg) 1993-12-24
IL99055A (en) 1994-12-29
HU9300263D0 (en) 1993-05-28
JPH05508952A (ja) 1993-12-09
US5555434A (en) 1996-09-10
FI930434A (fi) 1993-04-02
DE69101242D1 (de) 1994-03-31
EP0541684B1 (de) 1994-04-06
FI930435A0 (fi) 1993-02-01
CA2087023A1 (en) 1992-02-03
NO930301D0 (no) 1993-01-28
NO930303L (no) 1993-03-23
ES2050545T3 (es) 1994-05-16
DE69102065T2 (de) 1994-09-01
FI930435A (fi) 1993-04-02
FI930433A0 (fi) 1993-02-01
CA2086592A1 (en) 1992-02-03
CN1030018C (zh) 1995-10-11
EP0541682B1 (de) 1994-12-28
HUT63505A (en) 1993-08-30
AU8325091A (en) 1992-03-02
HU9204177D0 (en) 1993-03-29
US5241491A (en) 1993-08-31
EP0541684A1 (de) 1993-05-19
ATE116455T1 (de) 1995-01-15
DE69102065D1 (de) 1994-06-23
WO1992002875A1 (en) 1992-02-20
NZ239242A (en) 1994-12-22
AU654295B2 (en) 1994-11-03
ES2056655T3 (es) 1994-10-01
LTIP384A (en) 1994-11-25
NZ239240A (en) 1995-03-28
AU8331291A (en) 1992-03-02
ATE101933T1 (de) 1994-03-15
EP0541683A1 (de) 1993-05-19
CA2087022A1 (en) 1992-02-03
FI930433A (fi) 1993-02-01
DE69107460T2 (de) 1995-10-05
TW215959B (de) 1993-11-11
AU8333191A (en) 1992-03-02
FI930434A0 (fi) 1993-02-01
ZA916116B (en) 1992-05-27
HUT63710A (en) 1993-09-28
US5239502A (en) 1993-08-24
CA2086591A1 (en) 1992-02-03
AU8332991A (en) 1992-03-02
LTIP380A (en) 1994-12-27
WO1992002876A1 (en) 1992-02-20
WO1992002932A1 (en) 1992-02-20
CN1030019C (zh) 1995-10-11
TW215483B (de) 1993-11-01
EP0541685A1 (de) 1993-05-19
HU9300175D0 (en) 1993-04-28
LTIP381A (en) 1994-12-27
NO930302D0 (no) 1993-01-28
BG97386A (bg) 1993-12-24
LTIP382A (en) 1994-11-25
DE69107460D1 (de) 1995-03-23
CA2086539A1 (en) 1992-02-03
US5437049A (en) 1995-07-25
EP0541678A1 (de) 1993-05-19
EP0541682A1 (de) 1993-05-19
CN1062426A (zh) 1992-07-01
NO930302L (no) 1993-03-31
NO930303D0 (no) 1993-01-28
ES2051129T3 (es) 1994-06-01
ZA916123B (en) 1992-04-29
ATE104084T1 (de) 1994-04-15
DE69106369D1 (de) 1995-02-09
CN1059225A (zh) 1992-03-04
LTIP379A (en) 1994-11-25
ZA916121B (en) 1992-05-27
CN1027198C (zh) 1994-12-28
JPH05508725A (ja) 1993-12-02
AU8390291A (en) 1992-03-02
EP0548094A1 (de) 1993-06-30
IL99053A0 (en) 1992-07-15
US5325501A (en) 1994-06-28
TW215960B (de) 1993-11-11
EP0541678B1 (de) 1994-05-18
IL99051A0 (en) 1992-07-15
KR930701818A (ko) 1993-06-12
JPH05508723A (ja) 1993-12-02
ZA916119B (en) 1992-05-27
IL99055A0 (en) 1992-07-15
IL99054A0 (en) 1992-07-15
DE69101640T2 (de) 1994-07-21
CN1058667A (zh) 1992-02-12
IL99056A0 (en) 1992-07-15
JPH05508729A (ja) 1993-12-02
IL99052A (en) 1994-12-29
ZA916118B (en) 1992-05-27
ATE118640T1 (de) 1995-03-15
TW199926B (de) 1993-02-11
CN1059799A (zh) 1992-03-25
ZA916120B (en) 1993-01-27
EP0541683B1 (de) 1994-02-23
RO109487B1 (ro) 1995-02-28
NZ239239A (en) 1994-08-26
WO1992002877A1 (en) 1992-02-20
WO1992002874A1 (en) 1992-02-20
WO1992002933A1 (en) 1992-02-20
LTIP385A (en) 1994-11-25

Similar Documents

Publication Publication Date Title
SK391392A3 (en) Storage cell
CN102160117B (zh) 具有升压阵列电压的集成电路及其方法
US9934844B2 (en) SRAM bit-line and write assist apparatus and method for lowering dynamic power and peak current, and a dual input level-shifter
CN105845168B (zh) 用于通过控制预充电持续时间降低存储器电路中的功耗的方法和装置
US6335890B1 (en) Segmented write line architecture for writing magnetic random access memories
US4714839A (en) Control circuit for disabling or enabling the provision of redundancy
JP4970630B1 (ja) ソフトエラーアップセット不感性を有する揮発性記憶素子
US6031778A (en) Semiconductor integrated circuit
US5594692A (en) Semiconductor integrated circuit
CN107251141B (zh) 失配和噪声不敏感的自旋扭矩转移磁随机存取存储器
US4800529A (en) Semiconductive memory device with current control and comparison means to reduce power consumption and increase operating speed
KR102171121B1 (ko) 랜덤 액세스 메모리와, 연관 회로, 방법 및 장치
US11056161B2 (en) Data processing system and method for generating a digital code with a physically unclonable function
US5053648A (en) Master slice cmos array having complementary columns
US9558801B2 (en) Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method
JPS59127294A (ja) 高密度半導体メモリのワ−ド線デコ−ダ及びドライバ回路
US4338679A (en) Row driver circuit for semiconductor memory
US20220084583A1 (en) Electronic circuit and bistable circuit
US5229966A (en) Current control circuit for dynamic memory
KR100210627B1 (ko) 반도체 메모리 장치
US7768818B1 (en) Integrated circuit memory elements
TWI224339B (en) Semiconductor memory device reduced in power consumption during burn-in test
US4924443A (en) Semiconductor memory comprising a recognition circuit for signal changes
US20050093487A1 (en) Boosting circuit
US5134384A (en) Data coincidence detecting circuit