SG91371A1 - Tab tape with stiffener and semiconductor device using same - Google Patents

Tab tape with stiffener and semiconductor device using same

Info

Publication number
SG91371A1
SG91371A1 SG200104003A SG200104003A SG91371A1 SG 91371 A1 SG91371 A1 SG 91371A1 SG 200104003 A SG200104003 A SG 200104003A SG 200104003 A SG200104003 A SG 200104003A SG 91371 A1 SG91371 A1 SG 91371A1
Authority
SG
Singapore
Prior art keywords
stiffener
same
semiconductor device
tab tape
tab
Prior art date
Application number
SG200104003A
Other languages
English (en)
Inventor
Otaka Tatsuya
Susuki Sachio
Original Assignee
Hitachi Cable
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable filed Critical Hitachi Cable
Publication of SG91371A1 publication Critical patent/SG91371A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839Assembly of a flat lead with an insulating support, e.g. for TAB
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01004Beryllium [Be]
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    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/01028Nickel [Ni]
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    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
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    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
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    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
SG200104003A 2000-06-29 2001-06-29 Tab tape with stiffener and semiconductor device using same SG91371A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000201424A JP2002016175A (ja) 2000-06-29 2000-06-29 スティフナ付きtabテープ及びそれを用いた半導体装置

Publications (1)

Publication Number Publication Date
SG91371A1 true SG91371A1 (en) 2002-09-17

Family

ID=18699120

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200104003A SG91371A1 (en) 2000-06-29 2001-06-29 Tab tape with stiffener and semiconductor device using same

Country Status (5)

Country Link
US (1) US6509643B2 (ja)
JP (1) JP2002016175A (ja)
KR (1) KR20020002282A (ja)
SG (1) SG91371A1 (ja)
TW (1) TW536762B (ja)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6740962B1 (en) * 2000-02-24 2004-05-25 Micron Technology, Inc. Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same
KR20020065705A (ko) * 2001-02-07 2002-08-14 삼성전자 주식회사 테이프 배선 기판과 그 제조 방법 및 그를 이용한 반도체칩 패키지
US6808959B2 (en) * 2001-05-24 2004-10-26 Nec Electronics Corporation Semiconductor device having reinforced coupling between solder balls and substrate
US7064447B2 (en) * 2001-08-10 2006-06-20 Micron Technology, Inc. Bond pad structure comprising multiple bond pads with metal overlap
KR20030077784A (ko) * 2002-03-27 2003-10-04 주식회사 칩팩코리아 테이프 볼 그리드 어레이 패키지
KR100833941B1 (ko) * 2002-06-08 2008-05-30 삼성테크윈 주식회사 티비지에이 반도체 패키지
US6844621B2 (en) * 2002-08-13 2005-01-18 Fuji Electric Co., Ltd. Semiconductor device and method of relaxing thermal stress
JP3915630B2 (ja) * 2002-08-26 2007-05-16 日立電線株式会社 Tabテープ及びその製造方法並びにそれを用いた半導体装置
US7323772B2 (en) * 2002-08-28 2008-01-29 Micron Technology, Inc. Ball grid array structures and tape-based method of manufacturing same
CN100372084C (zh) * 2003-09-04 2008-02-27 美龙翔微电子科技(深圳)有限公司 热增强型球栅阵列集成电路封装基板制造方法及封装基板
US7061085B2 (en) * 2003-09-19 2006-06-13 Micron Technology, Inc. Semiconductor component and system having stiffener and circuit decal
US7701071B2 (en) * 2005-03-24 2010-04-20 Texas Instruments Incorporated Method for fabricating flip-attached and underfilled semiconductor devices
JP4615388B2 (ja) * 2005-07-25 2011-01-19 Okiセミコンダクタ株式会社 半導体パッケージ及びその製造方法
JP5050384B2 (ja) * 2006-03-31 2012-10-17 富士通セミコンダクター株式会社 半導体装置およびその製造方法
TWI327363B (en) * 2006-11-17 2010-07-11 Unimicron Technology Corp Carrier structure for semiconductor chip and method for manufacturing the same
JP2009016626A (ja) * 2007-07-06 2009-01-22 Panasonic Corp 半導体モジュール装置および半導体モジュール装置の製造方法ならびにフラットパネル型表示装置,プラズマディスプレイパネル
JP2009105139A (ja) * 2007-10-22 2009-05-14 Shinko Electric Ind Co Ltd 配線基板及びその製造方法と半導体装置
US8013439B2 (en) * 2008-06-30 2011-09-06 Intel Corporation Injection molded metal stiffener for packaging applications
JP2010108980A (ja) * 2008-10-28 2010-05-13 Elpida Memory Inc 半導体装置
TWI394258B (zh) * 2008-11-11 2013-04-21 Cyntec Co Ltd 晶片封裝結構及其製作方法
US9601434B2 (en) * 2010-12-10 2017-03-21 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming openings through insulating layer over encapsulant for enhanced adhesion of interconnect structure
US9576873B2 (en) * 2011-12-14 2017-02-21 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with routable trace and method of manufacture thereof
JP2019067873A (ja) * 2017-09-29 2019-04-25 太陽誘電株式会社 回路基板及び回路モジュール

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151513A (ja) * 1992-11-09 1994-05-31 Sumitomo Metal Ind Ltd 多層tabテープ
US5397921A (en) * 1993-09-03 1995-03-14 Advanced Semiconductor Assembly Technology Tab grid array

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213732A (ja) 1994-10-31 1996-08-20 Hewlett Packard Co <Hp> 多層集積回路パッケージおよびその製造方法
JP2755252B2 (ja) * 1996-05-30 1998-05-20 日本電気株式会社 半導体装置用パッケージ及び半導体装置
JP2825084B2 (ja) * 1996-08-29 1998-11-18 日本電気株式会社 半導体装置およびその製造方法
US6020637A (en) * 1997-05-07 2000-02-01 Signetics Kp Co., Ltd. Ball grid array semiconductor package
CA2344663A1 (en) * 1998-10-14 2000-04-20 3M Innovative Properties Company Tape ball grid array with interconnected ground plane
KR100343284B1 (ko) * 2000-06-23 2002-07-15 윤종용 반도체소자의 본딩패드 구조체 및 그 제조방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06151513A (ja) * 1992-11-09 1994-05-31 Sumitomo Metal Ind Ltd 多層tabテープ
US5397921A (en) * 1993-09-03 1995-03-14 Advanced Semiconductor Assembly Technology Tab grid array

Also Published As

Publication number Publication date
TW536762B (en) 2003-06-11
US20020017716A1 (en) 2002-02-14
JP2002016175A (ja) 2002-01-18
KR20020002282A (ko) 2002-01-09
US6509643B2 (en) 2003-01-21

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