SG84601A1 - Method for providing dual workfunction doping and protective insulating cap - Google Patents
Method for providing dual workfunction doping and protective insulating capInfo
- Publication number
- SG84601A1 SG84601A1 SG200002902A SG200002902A SG84601A1 SG 84601 A1 SG84601 A1 SG 84601A1 SG 200002902 A SG200002902 A SG 200002902A SG 200002902 A SG200002902 A SG 200002902A SG 84601 A1 SG84601 A1 SG 84601A1
- Authority
- SG
- Singapore
- Prior art keywords
- doping
- protective insulating
- insulating cap
- providing dual
- dual workfunction
- Prior art date
Links
- 230000009977 dual effect Effects 0.000 title 1
- 230000001681 protective effect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Memories (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/325,941 US6281064B1 (en) | 1999-06-04 | 1999-06-04 | Method for providing dual work function doping and protective insulating cap |
Publications (1)
Publication Number | Publication Date |
---|---|
SG84601A1 true SG84601A1 (en) | 2001-11-20 |
Family
ID=23270095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200002902A SG84601A1 (en) | 1999-06-04 | 2000-05-26 | Method for providing dual workfunction doping and protective insulating cap |
Country Status (6)
Country | Link |
---|---|
US (1) | US6281064B1 (ko) |
JP (1) | JP3398649B2 (ko) |
KR (1) | KR100338413B1 (ko) |
CN (1) | CN1142588C (ko) |
SG (1) | SG84601A1 (ko) |
TW (1) | TW451433B (ko) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6333220B1 (en) * | 1999-06-04 | 2001-12-25 | International Business Machines Corporation | Method and apparatus for providing low-GIDL dual workfunction gate doping with borderless diffusion contact |
TW463311B (en) * | 2000-10-02 | 2001-11-11 | United Microelectronics Corp | Manufacturing method of bit line |
US6518106B2 (en) * | 2001-05-26 | 2003-02-11 | Motorola, Inc. | Semiconductor device and a method therefor |
KR100377833B1 (ko) * | 2001-06-19 | 2003-03-29 | 삼성전자주식회사 | 보더리스 콘택 구조를 갖는 반도체 장치 및 그 제조방법 |
DE10135870C1 (de) | 2001-07-24 | 2003-02-20 | Infineon Technologies Ag | Verfahren zum Herstellen einer integrierten Halbleiterschaltung mit einem Speicher- und einem Logikbereich |
US6806197B2 (en) * | 2001-08-07 | 2004-10-19 | Micron Technology, Inc. | Method of forming integrated circuitry, and method of forming a contact opening |
DE10140047B4 (de) * | 2001-08-16 | 2006-05-04 | Infineon Technologies Ag | Verfahren zur Herstellung von Transistoren in integrierten Halbleiterschaltungen |
US6716734B2 (en) | 2001-09-28 | 2004-04-06 | Infineon Technologies Ag | Low temperature sidewall oxidation of W/WN/poly-gatestack |
US6709926B2 (en) | 2002-05-31 | 2004-03-23 | International Business Machines Corporation | High performance logic and high density embedded dram with borderless contact and antispacer |
DE10308927A1 (de) | 2003-02-28 | 2004-09-16 | Infineon Technologies Ag | Integrierte Halbleiterschaltung mit einem Transistor und mit einer Leiterbahn |
US7081416B2 (en) * | 2003-04-04 | 2006-07-25 | Micron Technology, Inc. | Methods of forming field effect transistor gates |
CN1327490C (zh) * | 2003-10-27 | 2007-07-18 | 上海宏力半导体制造有限公司 | 用于制造自行对准接触窗结构的方法 |
US7598134B2 (en) | 2004-07-28 | 2009-10-06 | Micron Technology, Inc. | Memory device forming methods |
US7518179B2 (en) | 2004-10-08 | 2009-04-14 | Freescale Semiconductor, Inc. | Virtual ground memory array and method therefor |
JP4400441B2 (ja) * | 2004-12-14 | 2010-01-20 | 三菱電機株式会社 | 半導体装置 |
JP4031000B2 (ja) * | 2005-01-13 | 2008-01-09 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
US7645687B2 (en) * | 2005-01-20 | 2010-01-12 | Chartered Semiconductor Manufacturing, Ltd. | Method to fabricate variable work function gates for FUSI devices |
US7285819B2 (en) * | 2005-07-25 | 2007-10-23 | Freescale Semiconductor, Inc. | Nonvolatile storage array with continuous control gate employing hot carrier injection programming |
US7256454B2 (en) * | 2005-07-25 | 2007-08-14 | Freescale Semiconductor, Inc | Electronic device including discontinuous storage elements and a process for forming the same |
US7582929B2 (en) * | 2005-07-25 | 2009-09-01 | Freescale Semiconductor, Inc | Electronic device including discontinuous storage elements |
US20070020840A1 (en) * | 2005-07-25 | 2007-01-25 | Freescale Semiconductor, Inc. | Programmable structure including nanocrystal storage elements in a trench |
US7112490B1 (en) * | 2005-07-25 | 2006-09-26 | Freescale Semiconductor, Inc. | Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench |
US7250340B2 (en) * | 2005-07-25 | 2007-07-31 | Freescale Semiconductor, Inc. | Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench |
US7642594B2 (en) * | 2005-07-25 | 2010-01-05 | Freescale Semiconductor, Inc | Electronic device including gate lines, bit lines, or a combination thereof |
US7394686B2 (en) * | 2005-07-25 | 2008-07-01 | Freescale Semiconductor, Inc. | Programmable structure including discontinuous storage elements and spacer control gates in a trench |
US7619270B2 (en) * | 2005-07-25 | 2009-11-17 | Freescale Semiconductor, Inc. | Electronic device including discontinuous storage elements |
US7619275B2 (en) * | 2005-07-25 | 2009-11-17 | Freescale Semiconductor, Inc. | Process for forming an electronic device including discontinuous storage elements |
US7262997B2 (en) * | 2005-07-25 | 2007-08-28 | Freescale Semiconductor, Inc. | Process for operating an electronic device including a memory array and conductive lines |
US7314798B2 (en) * | 2005-07-25 | 2008-01-01 | Freescale Semiconductor, Inc. | Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming |
US7592224B2 (en) | 2006-03-30 | 2009-09-22 | Freescale Semiconductor, Inc | Method of fabricating a storage device including decontinuous storage elements within and between trenches |
US7651916B2 (en) * | 2007-01-24 | 2010-01-26 | Freescale Semiconductor, Inc | Electronic device including trenches and discontinuous storage elements and processes of forming and using the same |
US7838922B2 (en) * | 2007-01-24 | 2010-11-23 | Freescale Semiconductor, Inc. | Electronic device including trenches and discontinuous storage elements |
US7572699B2 (en) * | 2007-01-24 | 2009-08-11 | Freescale Semiconductor, Inc | Process of forming an electronic device including fins and discontinuous storage elements |
JP2010092977A (ja) * | 2008-10-06 | 2010-04-22 | Panasonic Corp | 半導体装置及びその製造方法 |
US8136072B2 (en) * | 2008-11-03 | 2012-03-13 | Arm Limited | Standard cell placement |
KR101615654B1 (ko) * | 2010-05-14 | 2016-05-12 | 삼성전자주식회사 | 반도체 소자의 형성방법 |
US8557624B2 (en) | 2011-01-13 | 2013-10-15 | International Business Machines Corporation | Pixel sensor cells with a split-dielectric transfer gate |
US8299505B2 (en) | 2011-02-17 | 2012-10-30 | International Business Machines Corporation | Pixel sensor cell with a dual work function gate electode |
US9263330B2 (en) * | 2014-01-10 | 2016-02-16 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor device, method for forming contact and method for etching continuous recess |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3514500B2 (ja) * | 1994-01-28 | 2004-03-31 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
US5937289A (en) * | 1998-01-06 | 1999-08-10 | International Business Machines Corporation | Providing dual work function doping |
-
1999
- 1999-06-04 US US09/325,941 patent/US6281064B1/en not_active Expired - Fee Related
-
2000
- 2000-05-26 KR KR1020000028643A patent/KR100338413B1/ko not_active IP Right Cessation
- 2000-05-26 SG SG200002902A patent/SG84601A1/en unknown
- 2000-05-30 JP JP2000160921A patent/JP3398649B2/ja not_active Expired - Fee Related
- 2000-06-01 TW TW089110697A patent/TW451433B/zh not_active IP Right Cessation
- 2000-06-02 CN CNB001087908A patent/CN1142588C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US6281064B1 (en) | 2001-08-28 |
JP2000357749A (ja) | 2000-12-26 |
KR20010007124A (ko) | 2001-01-26 |
KR100338413B1 (ko) | 2002-05-27 |
TW451433B (en) | 2001-08-21 |
CN1276623A (zh) | 2000-12-13 |
JP3398649B2 (ja) | 2003-04-21 |
CN1142588C (zh) | 2004-03-17 |
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