SG44012A1 - A method for testing an integrated circuitry and an integrated circuit having a plurality of functional components and having junction/switch - Google Patents

A method for testing an integrated circuitry and an integrated circuit having a plurality of functional components and having junction/switch

Info

Publication number
SG44012A1
SG44012A1 SG1996009215A SG1996009215A SG44012A1 SG 44012 A1 SG44012 A1 SG 44012A1 SG 1996009215 A SG1996009215 A SG 1996009215A SG 1996009215 A SG1996009215 A SG 1996009215A SG 44012 A1 SG44012 A1 SG 44012A1
Authority
SG
Singapore
Prior art keywords
junction
switch
channel
functional components
inbreaking
Prior art date
Application number
SG1996009215A
Other languages
English (en)
Inventor
Cornelis Hermanus Van Berkel
Maria Elizabeth Roncken
Ronald Wilhelm Johan J Saeijs
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of SG44012A1 publication Critical patent/SG44012A1/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558—Addressing or selecting of subparts of the device under test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
SG1996009215A 1992-02-18 1993-02-10 A method for testing an integrated circuitry and an integrated circuit having a plurality of functional components and having junction/switch SG44012A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP92200455 1992-02-18

Publications (1)

Publication Number Publication Date
SG44012A1 true SG44012A1 (en) 1997-11-14

Family

ID=8210432

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996009215A SG44012A1 (en) 1992-02-18 1993-02-10 A method for testing an integrated circuitry and an integrated circuit having a plurality of functional components and having junction/switch

Country Status (9)

Country Link
US (1) US5590275A (de)
EP (1) EP0556894B1 (de)
JP (1) JPH0666894A (de)
KR (1) KR100284626B1 (de)
CN (1) CN1082302C (de)
BR (1) BR9300579A (de)
CZ (1) CZ383292A3 (de)
DE (1) DE69315364T2 (de)
SG (1) SG44012A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1060304C (zh) * 1996-01-25 2001-01-03 深圳市华为技术有限公司 程控交换设备的整机测试装置和方法
US5898886A (en) * 1996-11-19 1999-04-27 Advanced Micro Devices, Inc. Multimedia devices in computer system that selectively employ a communications protocol by determining the presence of the quaternary interface
US6199182B1 (en) * 1997-03-27 2001-03-06 Texas Instruments Incorporated Probeless testing of pad buffers on wafer
EP1306684B1 (de) 1997-04-25 2005-03-30 Matsushita Electric Industrial Co., Ltd. Verfahren zur Prüfsequenzgenerierung
US6405335B1 (en) 1998-02-25 2002-06-11 Texas Instruments Incorporated Position independent testing of circuits
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
JP5213982B2 (ja) * 2011-03-30 2013-06-19 アンリツ株式会社 移動体通信端末試験システム、解析方法、及び解析プログラム

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4494066A (en) * 1981-07-02 1985-01-15 International Business Machines Corporation Method of electrically testing a packaging structure having n interconnected integrated circuit chips
US4556471A (en) * 1983-10-14 1985-12-03 Multi-Arc Vacuum Systems Inc. Physical vapor deposition apparatus
NL8303536A (nl) * 1983-10-14 1985-05-01 Philips Nv Geintegreerde schakeling op grote schaal welke verdeeld is in isochrone gebieden, werkwijze voor het machinaal ontwerpen van zo een geintegreerde schakeling, en werkwijze voor het machinaal testen van zo een geintegreerde schakeling.
US5005136A (en) * 1988-02-16 1991-04-02 U.S. Philips Corporation Silicon-compiler method and arrangement
DE3886038T2 (de) * 1988-07-13 1994-05-19 Philips Nv Speichergerät, das einen zur Ausführung einer Selbstprüfung adaptierten statischen RAM-Speicher enthält und integrierte Schaltung, die als eingebauten statischen RAM-Speicher ein solches Gerät enthält.
NL8900151A (nl) * 1989-01-23 1990-08-16 Philips Nv Werkwijze voor het testen van een schakeling, alsmede schakeling geschikt voor een dergelijke werkwijze.
US5043986A (en) * 1989-05-18 1991-08-27 At&T Bell Laboratories Method and integrated circuit adapted for partial scan testability
US5079696A (en) * 1989-09-11 1992-01-07 Sun Microsystems, Inc. Apparatus for read handshake in high-speed asynchronous bus interface
US5132974A (en) * 1989-10-24 1992-07-21 Silc Technologies, Inc. Method and apparatus for designing integrated circuits for testability
US5119480A (en) * 1989-11-13 1992-06-02 International Business Machines Corporation Bus master interface circuit with transparent preemption of a data transfer operation
EP0434137B1 (de) * 1989-12-19 1997-04-02 Koninklijke Philips Electronics N.V. Anordnung zum Aufteilen und Testen von Submodulschaltkreisen von integrierten Schaltkreisen
NL9000544A (nl) * 1990-03-09 1991-10-01 Philips Nv Schrijf-erkenningscircuit bevattende schrijfdetector en bistabiel element voor vier-fase hand-shake signalering.
JP2627464B2 (ja) * 1990-03-29 1997-07-09 三菱電機株式会社 集積回路装置
US5166604A (en) * 1990-11-13 1992-11-24 Altera Corporation Methods and apparatus for facilitating scan testing of asynchronous logic circuitry

Also Published As

Publication number Publication date
CN1080447A (zh) 1994-01-05
DE69315364D1 (de) 1998-01-08
BR9300579A (pt) 1993-08-24
KR100284626B1 (ko) 2001-03-15
JPH0666894A (ja) 1994-03-11
US5590275A (en) 1996-12-31
EP0556894B1 (de) 1997-11-26
EP0556894A1 (de) 1993-08-25
CZ383292A3 (en) 1994-03-16
DE69315364T2 (de) 1998-05-28
KR930018280A (ko) 1993-09-21
CN1082302C (zh) 2002-04-03

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