SG185017A1 - Method for aligning semiconductor materials - Google Patents

Method for aligning semiconductor materials Download PDF

Info

Publication number
SG185017A1
SG185017A1 SG2012078846A SG2012078846A SG185017A1 SG 185017 A1 SG185017 A1 SG 185017A1 SG 2012078846 A SG2012078846 A SG 2012078846A SG 2012078846 A SG2012078846 A SG 2012078846A SG 185017 A1 SG185017 A1 SG 185017A1
Authority
SG
Singapore
Prior art keywords
semiconductor wafer
vision camera
alignment table
allowing
axis
Prior art date
Application number
SG2012078846A
Inventor
Kyung Shik Lee
Young Il Ko
Hyun Gyun Jung
Original Assignee
Hanmi Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020100041973A external-priority patent/KR101237056B1/en
Priority claimed from KR1020100048752A external-priority patent/KR101275697B1/en
Application filed by Hanmi Semiconductor Co Ltd filed Critical Hanmi Semiconductor Co Ltd
Publication of SG185017A1 publication Critical patent/SG185017A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

OF THE DISCLOSUREMETHOD FOR ALIGNING OF SEMICONDUCTOR WAFERDisclosed herein is a method for accurately aligning the position of a semiconductor wafer to accurately transfer the semiconductor wafer to aprocessing position in an apparatus for manufacturing a semiconductor package.That is, the present invention provides a method for aligning a semiconductor wafer, implemented in a wafer treatment apparatus such as a singulation apparatus that cuts a semiconductor wafer, on which a plurality ofsemiconductor packages are arranged in a matrix form, into each semiconductor package, the method characterized in that a vision camera photographs an arrangement relationship between the center of a dowel hole and that of the semiconductor package to accurately determine the position of the wafer in the X-, Y-, and Θ directions, thus accurately transferring the wafer toa processing position. Therefore, the method of the present invention can be effectively applied to a method for aligning a new type of wafer such as a wafer-level package. Especially, the method of the present invention can minimize the effect of errors due to vibration of the apparatus, etc. and obtain an accurate measurement value, thus accurately aligning the position of the wafer.Fig. 10

Description

METHOD FOR ALIGNING OF SEMICONDUCTOR WAFER
CROSS-REFERENCE TO RELATED APPLICATION
This application claims under 35 U.S.C. §119(a) the benefit of Korean
Patent Application No. 10-2010-0041973 filed May 4, 2010 and Korean Patent
Application No. 10-2010-0048752 filed May 25, 2010, the entire contents of which are incorporated herein by reference.
BACKGOUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for aligning the position of a semiconductor wafer and, more particularly, to a method for accurately aligning the position of a semiconductor wafer to accurately transfer the semiconductor wafer to a processing position in an apparatus for manufacturing a semiconductor package. 2. Description of Related Art
In general, a semiconductor package is manufactured in such a manner that a plurality of semiconductor packages, on which transistors and capacitors are integrated at a high density, are attached to a rectangular plate-shaped lead frame, the plurality of semiconductor packages are electrically connected to a pad of the lead frame by wire bonding, the resulting semiconductor packages are molded with epoxy resin, and the semiconductor packages on the lead frame are cut into each semiconductor package by a singulation process.
Recently, the types of semiconductor packages have been diversified, and thus a new packaging technology for singulating a semiconductor package has been developed.
Typically, in a singulation apparatus, a wafer on which a plurality of semiconductor packages are formed is placed on a chuck table and a cutting blade and the chuck table move relatively to each other such that the cutting blade cuts the wafer into each package. Here, the culling blade passes through a blade receiving groove configured to coincide with a cutting line of the wafer on the chuck table to perform a cutting process without being in contact with the chuck table.
However, when the wafer {0 be subjected to the cutting process has a circular shape such as a wafer-level package, it is difficult to allow the cutting line of the wafer to accurately coincide with the blade receiving groove on the chuck table, and thus, when the wafer is transferred to the position of the cutting process on the chuck table in the singulation process, the wafer may not be accurately placed on the chuck table.
As such, if the wafer is not accurately placed on the chuck {able for cutting, the cutting line of the wafer does not accurately coincide with the blade receiving groove on the chuck table, and thus the tip of the cutting blade may hit the top surface of the chuck table during the cutting process, which causes damage to the expensive cutting blade or chuck table.
Moreover, the wafer will not be cut into a desired shape along the cutting line formed in a matrix shape, and thus the semiconductor packages are determined as defective, which increases the manufacturing cost and significantly reduces the productivity.
Therefore, a process for accurately aligning the position of the wafer is necessarily required before the wafer such as the wafer-level package is transferred fo the position of the cutting process.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method for aligning a semiconductor wafer, implemented in a wafer treatment apparatus such as a singulation apparatus that cuts a semiconductor wafer, on which a plurality of semiconductor packages are arranged in a matrix form, into each semiconductor package, the method characterized in that a vision camera photographs an arrangement relationship between the center of a dowel hole and that of the semiconductor package to accurately determine the position of the wafer in the X-, Y-, and 8 directions, thus accurately transferring the wafer to a processing position. Therefore, the method of the present invention can be effectively applied to a method for aligning a new type of wafer such as a wafer- level package. Especially, the method of the present invention can minimize the effect of errors due to vibration of the apparatus, etc. and obtain an accurate measurement value, thus accurately aligning the position of the wafer.
In one aspect, the present invention provides a method for aligning a semiconductor wafer, the method comprising: (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera {o photograph a certain area on the semiconductor wafer and detect a tilted angle a of a matrix-like pattern, formed on the semiconductor wafer, with respect fo a reference coordinate system by a relative movement between the vision camera and the alignment table; (c) allowing the alignment table to rotate a predetermined angle (B =-a +
Nx 90°0orp =90°-a +N x 80° where N is an integer) based on the measured tilted angle; (d) allowing the vision camera and the alignment table to move relatively to each other such that a reference point, formed on a base on which the alignment table is provided, and a predetermined point on the semiconductor wafer are present at the same time in a field of view (FOV) of the vision camera, and allowing the vision camera to detect position information between the reference point and the predetermined point on the semiconductor wafer; (e) calculating a position correction value of the semiconductor wafer based on the detected position information; and (f) correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
Step (d) may be performed with respect to at least two pairs of reference points, formed on opposite sides with respect to the semiconductor wafer, and the predetermined point on the semiconductor wafer, respectively. in step (d), the vision camera may move with respect to the alignment table, the alignment table may move with respect to the vision camera, or both of them may move relatively to each other.
The method may further comprise: between step (c) and step (d), if the vision camera can move only in one axis (e.g., X-axis or Y-axis) direction and if the movement distance of the alignment table in the other axis (e.g., Y-axis or
X-axis) direction is less than half the diameter of the semiconductor wafer, allowing the alignment table to rotate a predetermined angle such that at least two reference marks, formed on the semiconductor wafer, are present in a photographing area of the vision camera; allowing the vision camera to detect a first position of each of the at least two reference marks, respectively; allowing the alignment table to rotate a predetermined angle; allowing the vision camera to detect a second position of any one of the at least two reference marks; calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
The method may further comprise, after step (c), allowing the vision camera to be positioned on an outer circumference of the semiconductor wafer in one axis (e.g., X-axis or Y-axis) direction by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate by 90°, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer.
The method may further comprise: between step (c) and step (d), detecting position information of at least two reference marks, formed on the semiconductor wafer, by a relative movement between the vision camera and the alignment table; calculating a position correction value of the semiconductor wafer based on the detected position information on the at least two reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
The predetermined point on the semiconductor wafer may be a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
In another aspect, the present invention provides a method for aligning a semiconductor wafer, the method comprising: (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera {o be positioned on an outer circumference of the semiconductor wafer by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer; (¢} allowing the vision camera and the alignment table to move relatively to each other such that a reference point, formed on a base on which the alignment {able is provided, and a predetermined point on the semiconductor wafer are present at the same time in a field of view (FOV) of the vision camera, and allowing the vision camera to detect position information between the reference point and the predetermined point on the semiconductor wafer; (d) calculating a position correction value of the semiconductor wafer based on the detected position information; and (e) correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value,
The method may further comprise: between step (c) and step (d), if the vision camera can move only in one axis (e.g., X-axis or Y-axis) direction and if the movement distance of the alignment table in the other axis (e.g., Y-axis or
X-axis) direction is less than half the diameter of the semiconductor wafer, allowing the alignment table to rotate a predetermined angle such that a reference mark, formed on the semiconductor wafer, is present in a photographing area of the vision camera; allowing the vision camera to detect a first position of the reference mark; allowing the alignment table to rotate a predetermined angle; allowing the vision camera to detect a second position of the reference mark and a position of at least one reference mark other than the reference mark; calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other features of the present invention will be described with reference fo certain exemplary embodiments thereof illustrated the attached drawings in which:
FIG. 1 is a schematic plan view partially showing the configuration of a semiconductor wafer singulation apparatus fo which a method for aligning a semiconductor wafer according to the present invention is applied;
FIGS. 2 to 9 are plan views sequentially showing a method for aligning a semiconductor wafer according to one embodiment of the present invention implemented in the semiconductor wafer singulation apparatus of FIG. 1;
FIGS. 10 and 11 are plan views showing a second correction process after the semiconductor wafer alignment according to one embodiment of the present invention implemented in the semiconductor wafer singulation apparatus of FIG. 1; and
FIG. 12 is a plan view showing a method for aligning a semiconductor wafer according to another embodiment of the present invention implemented in the semiconductor wafer singulation apparatus of FIG. 1.
Reference numerals set forth in the drawings includes reference to the following elements as further discussed below: 10: loading unit 11: alignment table 12: transfer robot 13: cutting unit 14. strip picker 15: brush cleaning unit
16: washing unit 17: unit picker 18: vision camera 19: chuck table 20: cutting blade 21: blade receiving groove 22: dowel hole
W: semiconductor wafer N: notch
F4 to Fs: reference marks
Ow. center point of semiconductor wafer
O+: rotation center of alignment {able
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, preferred embodiments of a method for aligning a semiconductor wafer according to the present invention will be described in detail with reference to the accompanying drawings.
First, as an example of a semiconductor wafer treatment apparatus for performing the method for aligning the semiconductor wafer according to the present invention, the configuration of a semiconductor wafer singulation apparatus will be described briefly with reference to FIG. 1.
The semiconductor wafer singulation apparatus includes: a loading unit 10 on which circular semiconductor wafers W, each including a plurality of semiconductor packages arranged in a matrix form and loaded in a magazine M, are loaded; an alignment table 11 on which the semiconductor wafer W taken out of the loading unit 10 is placed and aligned; a transfer robot 12 for g transferring the semiconductor wafer W from the loading unit 10 to the alignment table 11; a cutting unit 13 for cutting the semiconductor wafer W transferred from the alignment table 11 into each semiconductor package; a strip picker 14 for vacuum-sucking the semiconductor wafer W on the alignment table 11 and transferring it to the cutting unit 13; and a unit picker 17 for vacuum-sucking the semiconductor package on the cutting unit 13 and transferring it to a brush cleaning unit 15, a washing unit 16, and a vision inspection unit (not shown),
The operation of each of the above components is controlled by a controller (not shown) of the semiconductor wafer singulation apparatus,
A vision camera 18 for photographing the semiconductor wafer W on the alignment table 11 to detect the position thereof is provided on the top of the alignment table 11.
The vision camera 18 is fixed to one side of the strip picker 14 to move along with the strip picker 14, or alternatively, the vision camera 18 may be configured to move in the X-axis direction, independently from the strip picker 14.
The cutting unit 13 includes a chuck table 19 on which the semiconductor wafer W is placed and a cutting blade 20 moving relatively with respect to the chuck table 19 and cutting the semiconductor wafer W on the chuck table 18.
A blade receiving groove 21, in which the tip of the cutting blade 20 is received in a non-contact manner, is formed on the upper surface of the chuck table 19, which corresponds to the package cutting line formed in a matrix shape on the semiconductor wafer W.
Therefore, when the cutting blade 20 moving relatively with respect fo the chuck table 19 cuts the semiconductor wafer W on the chuck table 19 along the cutting line, the tip of the cutting blade 20 passes through the blade receiving groove 21 and cuts the semiconductor wafer W without being in contact with the chuck table 19.
Meanwhile, the method for aligning the semiconductor wafer according to the present invention is performed on the alignment table 11. Here, the alignment table 11 is provided on an X-Y-8 stage (not shown) capable of rotating in the X axis direction, in the Y-axis direction, and in the 8 direction with respect to a vertical axis to correct the position of the semiconductor wafer W placed on the alignment table 11. The X-Y-8 stage moving the alignment table 11 moves over a distance to finely adjust the position of the semiconductor wafer W within a range that does not increase the overall size of the apparatus.
Especially, the present invention provides a method for accurately align the semiconductor wafer W by minimizing the effect of errors due to vibration of the apparatus, efc.
For this purpose, as shown in FIGS. 10 and 11, when the semiconductor wafer W is placed on the alignment table 11, the vision camera 18 moves in the X-axis direction fo detect a matrix-like patlern formed on the i top of one side of the semiconductor wafer W, e.g., on the top of the middle of the semiconductor wafer W, thus determining how much the pattern is titled.
Here, the matrix-like pattern formed on the semiconductor wafer W represents the cutting line through which the blade passes or onto which a laser beam is irradiated to cut the semiconductor wafer W into each semiconductor package. if the titled angle with respect to a reference coordinate system of the matrix-like pattern formed on the semiconductor wafer W is ta, an angle, at which the alignment table should rotate such that the matrix-like pattern is parallel to the reference coordinate system, B = (N x 90°) — ta or B = (90° - a) + (N x 90°), where N is an integer.
Subsequently, the alignment table 11 is rotated a predetermined angle in the 8 direction, based on the information of the semiconductor wafer W stored in the controller, to be perpendicular to the semiconductor wafer W.
That is, the alignment table 11 is rotated a predetermined angle in the 8 direction such that the matrix-like pattern of the semiconductor wafer W coincides with the blade receiving groove 21 of the chuck table 19,
Then, the vision camera 18 is moved in the X-axis direction fo photograph dowel holes 22 fixedly positioned on both sides of the alignment fable 11 and a semiconductor package positioned around the edge of the semiconductor wafer W adjacent to the dowel holes 22, thus detecting the positions thereof.
For example, the vision camera 18 is horizontally moved in the X-axis direction to detect the central position of the dowel hole 22 and the central position of a certain semiconductor package on the semiconductor wafer W adjacent thereto.
Here, the semiconductor package represents a reference semiconductor package whose position is to be detected based on the information of the semiconductor wafer W stored in the controller.
The process of determining the position of the dowel hole 22 and that of the reference semiconductor package may be performed at least once and, if a more accurate position detection value is required, the process may be performed twice. At this time, after photographing the dowel hole 22 on one side and the reference semiconductor package adjacent thereto, the vision camera 18 may horizontally move in the X-axis direction to photograph the dowel hole 22 on the other side and the reference semiconductor package adjacent thereto.
As such, when the central positions of the dowel holes 22 on both sides and those of the reference semiconductor packages are detected, a difference between the detected relative position and a target relative position is calculated, and thus a position correction value of the semiconductor wafer W can be calculated.
Therefore, the controller (not shown) calculates a correction value based on the central position of the semiconductor package and that of the dowel hole 22 and moves the alignment table 11 in the 9 direction and/or in the
X-axis direction and/or in the Y-axis direction, thereby correcting the position of the semiconductor wafer W to coincide with the information on the position relationship between the dowel hole 22 and the reference semiconductor package, stored in the controller.
As such, the position of the semiconductor wafer W can be corrected once or twice based on the position information detected by the vision camera 18 with respect to the dowel holes 22 whose positions are fixed, and thus it is possible to accurately correct the position of the semiconductor wafer W while minimizing the effect of errors due to vibration of the apparatus, etc.
Meanwhile, prior to performing the method for aligning the position of the semiconductor wafer W in the above manner, the present invention provides a method for aligning the position of a semiconductor wafer W with respect to reference marks F, fo F, of the semiconductor wafer W.
Referring to FIGS. 2 to 9, a method for aligning a semiconductor wafer according to another embodiment of the present invention will be described below.
Here, when the semiconductor wafer W is placed on the alignment table 11 from the loading unit 10 by the transfer robot 12, the vision camera 18 moves in the X-axis direction over the alignment table to photograph a notch N (see
FIG. 2) and reference marks Fy to Fy, (see FIG. 2), formed on the edge of the semiconductor wafer W, in a predetermine order, thus determining the position of the semiconductor wafer W on the alignment table 11. Then, based on the determined position, the position of the semiconductor wafer W is corrected to a predetermined reference position such that the semiconductor wafer W is placed on an accurate position of the strip picker 14 to be picked up by the strip picker 14.
First, the semiconductor has a circular shape and may include a notch
N concavely formed on the outer circumference as a reference point of the semiconductor wafer W.
Moreover, a plurality of reference marks F; to Fs; are formed in predetermined positions spaced a predetermined distance from a centerline passing through the notch N of the semiconductor wafer W.
Information on the distances from the center of the semiconductor wafer
W {fo the respective reference marks Fy to F4 in the X-axis direction and in the Y- axis direction is pre-stored in the controller (not shown).
As shown in FIG. 2, when the semiconductor wafer W is placed on the alignment table 11, the vision camera 18 moves in the X-axis direction and photographs the semiconductor wafer W from the top of the center of the semiconductor wafer W to detect the cutting line of the semiconductor wafer W formed in a matrix shape, thereby determine how much the pattern is tilted.
Then, based on the information of the semiconductor wafer W stored in the controller, the alignment table 11 is rotated a predetermined angle in the © direction such that the cutting line of the semiconductor wafer W coincides with the blade receiving groove 21 of the chuck table 19 (see FIG. 1).
Subsequently, the vision camera 18 moves in the X-axis direction to be positioned at the top of the edge of one side of the semiconductor wafer W (80° in a clockwise direction in the figure). In this state, the vision camera 18 rotates by 90° in one direction to detect the notch N formed in the edge of one side of the semiconductor wafer W.
When the notch N is positioned at the bottom of the vision camera 18 as shown in FIG. 3, the alignment table 11 rotates a predetermined angle in the clockwise direction, as shown in FIG. 4, to adjust the position of the semiconductor wafer W such that a first reference mark F, and a third reference mark Fj; are present in a photographing area of the vision camera 18. Then, the vision camera 18 photographs the first reference mark Fy to detect the position coordinates of the first reference mark Fy.
Next, as shown in FIG. 5, the vision camera 18 moves in the X-axis direction, photographs the third reference mark F; to determine the position information on the third reference mark F3, and returns to the initial position.
Here, since the vision camera 18 horizontally moves in the X-axis direction, it is possible to determine how much the semiconductor wafer W deviates from the centerline based on the position information on the first and third reference marks Fy and Fs.
In addition, to further increase the accuracy, the above sequence may be repeated such that the semiconductor wafer W coincides with the centerline.
That is, after a process of rotating the alignment table 11 a predetermined angle corresponding to the value obtained by the vision camera 18 moving in the X-axis direction and photographing the first and third reference marks Fy and Fj, that is, corresponding to the degree that the semiconductor wafer W deviates from the centerline, and obtaining the position information on the first and third reference marks F4 and F3; by photographing is repeatedly performed such that the first and third reference marks Fy and F3 are positioned on the centerline, the following process may be performed.
As such, when the positions of the first and third reference marks Fy and F;, detected by the vision camera 18, are not symmetrical to each other with respect to the centerline or in order to further increase the accuracy, it is possible fo allow the vision camera 18 to detect the position of the first reference mark Fi, allow the alignment table 11 to be rotated a predetermined angle such that the third reference mark Fj is positioned on the centerline, and then allow the vision camera 18 to detect the position of the third reference mark F3 by photographing.
As mentioned above, when the positions of the first and third reference marks F; and F; are detected, the controller (not shown) detects a first position of a center point Ow of the semiconductor wafer W based on the detected positions of the first and third reference marks Fy and F; and the pre-stored information regarding the distance between the first and third reference marks
FF and F3 and the center point Ow.
Then, as shown in FIG. 6, the alignment table 11 rotates 180° in a counterclockwise direction such that the third reference mark F3 is present in the photographing area of the vision camera 18, thus photographing a second position of the third reference mark Fs.
Subsequently, as shown in FIG. 7, the vision camera 18 moves again in the Y-axis direction to photograph the first reference mark F4, thus detecting a second position of the first reference mark F;.
Here, second position coordinates of the center point Ow of the semiconductor wafer W are determined by the detected second position coordinates of the first and third reference marks Fy and Fs.
As such, when the first and second positions of the center point Ow of the semiconductor wafer W are determined, it is possible to detect the position of a rotation center Or of the alignment table 11 by a difference between the first and second positions of the center point Ow.
If the center point Ow of the semiconductor wafer W coincides with the position of the rotation center Or of the alignment table 11, the position of the center point Ow is not changed even though the alignment table 11 rotates 180°.
However, as shown in FIG. 7, if the center point Ow of the semiconductor wafer
W does not coincide with the position of the rotation center Oy of the alignment table 11, the position of the center point Ow is changed when the alignment table 11 rotates 180°
Therefore, when the position of the center point Ow of the semiconductor wafer W is known, it is possible to determine the position of the rotation center Oy of the alignment table 11, in this embodiment, to increase the accuracy, the position of the rotation center Or of the alignment table 11 is determined by detecting both the first and second positions of the first and third reference marks Fy and F3. However, it is possible to determine the position of the rotation center Or of the alignment table 11 by determining either the position of the first reference mark Fy or that of the third reference mark Fs. in the determination of the position of the rotation center Oy of the alignment table 11, it is possible to determine how much the center point Ow of the semiconductor wafer W deviates from the rotation center Or of the alignment table 11 which is obtained in advance using a jig or a dummy semiconductor wafer and then stored in the controller.
However, since the alignment table 11 is mechanically rotated by a motor, for example, the rotation center may slightly vary during use.
Therefore, the above-described process of determining the position of the rotation center Or of the alignment table 11 by placing the semiconductor wafer W on the alignment table 11, detecting first positions of the first and third reference marks Fy and F3 by photographing, rotating the alignment table 11 180°, and detecting second positions of the first and third reference marks Fy and F; is more accurate.
Meanwhile, as shown in FIG. 8, a pair of dowel holes 22 are fixedly provided on both sides of the alignment table 11 to allow the strip picker 14 to be guided to an accurate position when the strip picker 14 vacuum-sucks the semiconductor wafer W on the alignment table 11. A pair of position determining pins (not shown) projecting downward are formed on both sides of the strip picker 14 to be inserted into each dowel hole 22.
Therefore, when the strip picker 14 picks up the semiconductor wafer W on the alignment table 11, the position determining pins of the strip picker 14 are inserted into the dowel holes 22 such that the strip picker 14 picks up the semiconductor wafer W in a constant position. Therefore, if the center point
Ow of the semiconductor wafer W coincides with the center position between the dowel holes 22, i.e., the center of the wafer pickup position, the strip picker 14 can pick up the semiconductor wafer W from an accurate position.
As mentioned above, when the position of the center point Ow of the semiconductor wafer W is detected, it is possible to determine the deviation of the center point Ow of the semiconductor wafer W from the rotation center Or of the alignment table 11, and thus it is possible to calculate a substantial rotation of the semiconductor wafer W according to the rotation of the alignment table 11.
Therefore, as shown in FIG. 9, the controller (not shown) calculates a correction value based on the second position of the center point Ow of the semiconductor wafer W and the position of the rotation center Or of the alignment table 11, rotates the alignment table 11 a predetermined angle, and then moves the alignment table 11 in the X-axis direction and/or in the Y-axis direction such that the center point Ow of the semiconductor wafer W coincides with the center position between the dowel holes 22, thus correcting the position of the semiconductor wafer W.
Here, the rotation angle of the alignment table 11 is determined by reflecting the value that the first and third reference marks F1 and F; rotate to be present in the photographing area of the vision camera 18 and the value that the semiconductor wafer W deviates from the centerline when the vision camera 18 moving in the X-axis direction photographs the first and third reference marks Fy and F3, based on the deviation between the rotation center
Or of the alignment table 11 and the center point Ow of the semiconductor wafer
WwW,
As such, according to the present invention, even though the reference marks Fy; and F; on the semiconductor wafer W deviate from the centerline passing through the notch N, the vision camera 18 can determine the positions of the reference marks Fy to F; while moving in one direction (i.e., in the X-axis direction). As a result, it is possible to determine the position of the center point Ow of the semiconductor wafer W and the position of the rotation center
Or of the alignment table 11 based on the positions of the reference marks F4 to
Fs, thereby accurately correcting the position of the semiconductor wafer W.
Therefore, the semiconductor wafer W can be accurately transferred to the next processing position and subjected to the next process, and thus it is possible to minimize the occurrence of defects.
Meanwhile, as another example of the method for aligning the semiconductor wafer W, the present invention provide a method for correcting the position of a semiconductor wafer W by detecting the position of each reference mark with respect to the semiconductor wafer W using the vision camera 18 capable of moving in the X- and Y-axis directions and by using the detection information.
For this purpose, as shown in FIG. 12, the vision camera 18 first moves to photograph a predetermined area of the semiconductor wafer W, i.e., the central area of the semiconductor wafer W, thus measuring the tilting degree of a matrix-like pattern formed on the semiconductor wafer W. Then, the alignment table 11 is rotated a predetermined angle in the 8 direction based on the measurement information to be perpendicular to the semiconductor wafer W.
Next, the vision camera 18 moves to the top of the semiconductor wafer
W and horizontally moves in the X- and Y-axis directions to detect the positions of at least two reference marks among a plurality of reference marks.
For example, the vision camera 18 moves freely in the X-axis direction and/or in the Y-axis direction, photographs a first reference mark F¢ to detect the position coordinates thereof, and photographs a third reference mark F; to detect the position coordinates thereof,
As such, when the positions of the first and third reference marks Fy and Fs are detected, the controller (not shown) detects the position of the center point Ow of the semiconductor wafer W based on the detected positions of the first and third reference marks Fy and F; and the pre-stored information regarding the distance between the first and third reference marks Fy and F3 and the center point Ow.
Then, a position correction value of the semiconductor wafer W is calculated based on the position information of the reference marks such as the first and third reference marks Fy and Fj, and then the alignment table 11 is horizontally or rotatably moved, thus correcting the position of the semiconductor wafer W.
As such, the accurately aligned semiconductor wafer W can be accurately transferred fo the next processing position and subjected to the next process, and thus it is possible to minimize the occurrence of defects.
While the above-described embodiments are directed to the method for aligning the semiconductor wafer W in the singulation apparatus for cutting the semiconductor wafer W into each semiconductor package, the method for aligning the semiconductor wafer W according to the present invention can be applied in the same or similar manner to any wafer treatment apparatus that handles various types of wafers, besides the semiconductor wafer singulation apparatus.
Moreover, it will be apparent that, when the alignment method according to the present invention is implemented using a jig having a shape corresponding to the semiconductor wafer, it belongs to the technical scope of the present invention. Such a jig may have a size corresponding to that of the semiconductor wafer and may include a matrix-like pattern, a reference mark, and/or a notch. The jig is nothing but a kind of dummy semiconductor wafer, and it is obvious to those skilled in the art to which the present invention pertains that the jig is the same as the semiconductor wafer or an equivalent thereof and is widely used.
As described above, the method for aligning the semiconductor wafer according to the present invention has the following advantages:
First, since the vision camera can casily detect the position of the reference mark formed the wafer, even through the corresponding wafer is a new even on a new type of wafer such as a wafer-level package, on which the reference mark deviates from the centerline of the wafer, the position in which the wafer is placed can be accurately determined. Therefore, the position of the wafer can be accurately aligned by correcting the position of the wafer based on the determined position in which the wafer is placed; and
Second, the relationship between the position of the fixed reference point such as a dowel hole and the position of the center point of the semiconductor package on the wafer is photographed by the vision camera once or twice to determine a position correction value of the wafer, and the position of the wafer can be corrected and aligned based on the position correction value with the minimum number of times of photographing:
Therefore, it is possible to minimize the occurrence of errors on the measurement value by the vision camera due to vibration of the apparatus, etc.
and obtain an accurate measurement value, thus accurately aligning the position of the wafer.
As above, preferred embodiments of the present invention have been described and illustrated, however, the present invention is not limited thereto, rather, it should be understood that various modifications and variations of the present invention can be made thereto by those skilled in the art without departing from the spirit and the technical scope of the present invention as defined by the appended claims.

Claims (37)

What is claimed is:
1. A method for aligning a semiconductor wafer, the method comprising; (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera to photograph a certain area on the semiconductor wafer and detect a tilted angle a of a matrix-like pattern, formed on the semiconductor wafer, with respect to a reference coordinate system by a relative movement between the vision camera and the alignment table; (c) allowing the alignment table to rotate a predetermined angle based on the measured lifted angle; (d} allowing the vision camera and the alignment table to move relatively to each other such that a reference point, formed on a base on which the alignment table is provided, and a predetermined point on the semiconductor wafer are present at the same time in a field of view (FOV) of the vision camera, and allowing the vision camera to detect position information between the reference point and the predetermined point on the semiconductor wafer; (e) calculating a position correction value of the semiconductor wafer based on the detected position information; and (f) correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
2. The method of claim 1, wherein step (d) is performed with respect to at least two pairs of reference points, formed on opposite sides with respect to the semiconductor wafer, and the predetermined point on the semiconductor wafer, respectively.
3. The method of claim 1, wherein in step (d), the vision camera moves with respect to the alignment table, the alignment table moves with respect to the vision camera, or both of them move relatively to each other.
4. The method of any one of claims 1 to 3, further comprising: between step (c¢) and step (d), if the vision camera can move only in one axis (e.g., X-axis or Y-axis) direction and if the movement distance of the alignment table in the other axis (Y-axis or X-axis) direction is less than half the diameter of the semiconductor wafer, allowing the alignment table to rotate a predetermined angle such that at least two reference marks, formed on the semiconductor wafer, are present in a photographing area of the vision camera; allowing the vision camera to detect a first position of each of the at least two reference marks, respectively; allowing the alignment table to rotate a predetermined angle; allowing the vision camera to detect a second position of any one of the at least two reference marks;
calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
5. The method of claim 4, wherein the predetermined angle is 180° or 90°,
6. The method of any one of claims 1 to 3, further comprising, after step (c), allowing the vision camera to be positioned on an outer circumference of the semiconductor wafer in one axis (X-axis or Y-axis) direction by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate by 80°, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer.
7. The method of claim 4, further comprising, after step (c), allowing the vision camera {o be positioned on an outer circumference of the semiconductor wafer in one axis (X-axis or Y-axis) direction by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate by 90°, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer.
8. The method of any one of claims 1 to 3, further comprising: between step (c) and step (d), detecting position information of at least two reference marks, formed on the semiconductor wafer, by a relative movement between the vision camera and the alignment table; calculating a position correction value of the semiconductor wafer based on the detected position information on the at least two reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
9. The method of any one of claims 1 to 3, wherein the reference point is a dowel hole.
10. The method of any one of claims 1 to 3, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
11. The method of claim 4, wherein the reference point is a dowel hole.
12. The method of claim 4, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
13. The method of claim 8, wherein the reference point is a dowel hole.
14. The method of claim 8, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
15. A method for aligning & semiconductor wafer, the method comprising: (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera to be positioned on an outer circumference of the semiconductor wafer by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer;
(c) allowing the vision camera and the alignment table to move relatively to each other such that a reference point, formed on a base on which the alignment table is provided, and a predetermined point on the semiconductor wafer are present at the same time in a field of view (FOV) of the vision camera, and allowing the vision camera to detect position information between the reference point and the predetermined point on the semiconductor wafer; (d) calculating a position correction value of the semiconductor wafer based on the detected position information; and (e) correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
16. The method of claim 15, wherein step (d) is performed with respect to at least two pairs of reference points, formed on opposite sides with respect to the semiconductor wafer, and the predetermined point on the semiconductor wafer, respectively.
17. The method of claim 15, wherein in step (c), the vision camera moves with respect fo the alignment table, the alignment table moves with respect fo the vision camera, or both of them move relatively to each other.
18. The method of any one of claims 15 to 17, further comprising: between step (b) and step (c), if the vision camera can move only in one axis (e.g., X-axis or Y-axis) direction and if the movement distance of the alignment table in the other axis (Y-axis or X-axis) direction is less than half the diameter of the semiconductor wafer, allowing the alignment table to rotate a predetermined angle such that at least two reference marks, formed on the semiconductor wafer, are present in a photographing area of the vision camera; allowing the vision camera to detect a first position of each of the at least two reference marks, respectively; allowing the alignment table to rotate a predetermined angle; allowing the vision camera to detect a second position of each of the at least two reference marks, respectively; calculating a position correction value of the semiconductor wafer 16 based on the detected position information on the reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
19. The method of claim 18, wherein the predetermined angle is 180° or a0°.
20. The method of any one of claims 15 to 17, wherein the reference point is a dowel hole.
21. The method of any one of claims 15 fo 17, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
22. The method of claim 18, wherein the reference point is a dowel hole.
23. The method of claim 18, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
24. The method of any one of claims 1 to 3, further comprising: between step (c) and step (d), if the vision camera can move only in one axis (e.g., X-axis or Y-axis) direction and if the movement distance of the alignment table in the other axis (e.g., Y-axis or X-axis) direction is less than half the diameter of the semiconductor wafer, allowing the alignment table to rotate a predetermined angle such that a reference mark, formed on the semiconductor wafer, is present in a photographing area of the vision camera; allowing the vision camera to detect a first position of the reference mark; allowing the alignment table to rotate a predetermined angle; allowing the vision camera to detect a second position of the reference mark and a position of at least one reference mark other than the reference mark; calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
25. The method of claim 24, wherein the predetermined angle is 180°.
26. The method of claim 24, further comprising, after step (c), allowing the vision camera to be positioned on an outer circumference of the semiconductor wafer in one axis (e.g., X-axis or Y-axis) direction by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate by 80°, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer.
27. The method of claim 24, wherein the reference point is a dowel hole.
28. The method of claim 24, wherein the predetermined point on the semiconductor wafer is a semiconductor package, which is present together with the reference point in the FOV of the vision cameral, among a plurality of semiconductor packages.
29. A method for aligning a semiconductor wafer, the method comprising: (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera to photograph a certain area on the semiconductor wafer and detect a tilted angle a of a matrix-like pattern, formed on the semiconductor wafer, with respect to a reference coordinate system by a relative movement between the vision camera and the alignment table; (c) allowing the alignment table to rotate a predetermined angle based on the measured tilted angle; (d) allowing the alignment table to rotate a predetermined angle such that at least two reference marks, formed on the semiconductor wafer, are present in a photographing area of the vision camera; {e) allowing the vision camera to detect a first position of each of the at least two reference marks, respectively; {f) allowing the alignment table to rotate a predetermined angle; {g) allowing the vision camera to detect a second position of any one of the at least two reference marks; and (h) calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer, and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
30. The method of claim 29, wherein the predetermined angle is 180° or
90°.
31. The method of claim 29, further comprising, after step (c), allowing the vision camera to be positioned on an outer circumference of the semiconductor wafer in one axis (X-axis or Y-axis) direction by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer to rotate by 90°, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer.
32. The method of claim 29, wherein step (h) comprises: detecting a position of a rotation center of the alignment table based on the detected first and second position information on the reference marks on the semiconductor wafer; calculating a position correction value such that a position of a center point of the semiconductor wafer coincides with a center of a pickup position of a strip picker based on the detected position of the rotation center of the alignment table; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
33. The method of claim 29, wherein the alignment table comprises a plurality of dowel holes formed on both sides thereof and determining the pickup position of the strip picker, and in step (h), a controller corrects the position of the semiconductor wafer such that the center point of the semiconductor wafer coincides with a center between the plurality of dowel holes.
34. A method for aligning a semiconductor wafer, the method comprising: (a) placing a semiconductor wafer on an alignment table; (b) allowing a vision camera fo be positioned on an outer circumference of the semiconductor wafer by a relative movement between the vision camera and the alignment table, allowing the semiconductor wafer fo rotate, and allowing the vision camera to detect a notch formed on the outer circumference of the semiconductor wafer, {c) allowing the alignment table to rotate a predetermined angle such that at least two reference marks, formed on the semiconductor wafer, are present in a photographing area of the vision camera; (d) allowing the vision camera to detect a first position of each of the at least two reference marks, respectively; (e) allowing the alignment table to rotate a predetermined angle; (f} allowing the vision camera to detect a second position of any one of the at least two reference marks; and (g) calculating a position correction value of the semiconductor wafer based on the detected position information on the reference marks on the semiconductor wafer, and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
35. The method of claim 34, wherein the predetermined angle is 180° or ape.
36. The method of claim 34, wherein step (g) comprises: detecting a position of a rotation center of the alignment table based on the detected first and second position information on the reference marks on the semiconductor wafer; calculating a position correction value such that a position of a center point of the semiconductor wafer coincides with a center of a pickup position of a strip picker based on the detected position of the center point of the alignment t{able; and correcting the position of the semiconductor wafer by horizontally or rotatably moving the alignment table based on the calculated position correction value.
37. The method of claim 34, wherein the alignment table comprises a plurality of dowel holes formed on both sides thereof and determining the pickup position of the strip picker, and in step (g), a controller corrects the position of the semiconductor wafer such that the center point of the semiconductor wafer coincides with a center between the plurality of dowel holes.
SG2012078846A 2010-05-04 2011-05-02 Method for aligning semiconductor materials SG185017A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1020100041973A KR101237056B1 (en) 2010-05-04 2010-05-04 Method for Aligning Semiconductor Package Aggregate
KR1020100048752A KR101275697B1 (en) 2010-05-25 2010-05-25 Method for Aligning Semiconductor Wafer
PCT/KR2011/003268 WO2011139061A2 (en) 2010-05-04 2011-05-02 Method for aligning semiconductor materials

Publications (1)

Publication Number Publication Date
SG185017A1 true SG185017A1 (en) 2012-11-29

Family

ID=44904204

Family Applications (1)

Application Number Title Priority Date Filing Date
SG2012078846A SG185017A1 (en) 2010-05-04 2011-05-02 Method for aligning semiconductor materials

Country Status (5)

Country Link
CN (1) CN102934216B (en)
PT (1) PT2011139061W (en)
SG (1) SG185017A1 (en)
TW (1) TWI543294B (en)
WO (1) WO2011139061A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6218511B2 (en) * 2013-09-02 2017-10-25 Towa株式会社 Cutting apparatus and cutting method
JP6612670B2 (en) * 2016-03-31 2019-11-27 東京応化工業株式会社 Substrate processing apparatus and substrate processing method
JP2019027924A (en) * 2017-07-31 2019-02-21 セイコーエプソン株式会社 Electronic component conveyance device, electronic component inspection device, positioning device, component conveyance device, and positioning method
KR102019377B1 (en) * 2017-11-24 2019-09-06 한미반도체 주식회사 Sawing Apparatus of Semiconductor Materials
WO2020083612A1 (en) * 2018-10-23 2020-04-30 Asml Netherlands B.V. Method and apparatus for adaptive alignment

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2808996B2 (en) * 1992-07-24 1998-10-08 富士通株式会社 Method for manufacturing semiconductor device
JPH06120322A (en) * 1992-10-05 1994-04-28 Hitachi Ltd Method of recognizing position of semiconductor wafer, and semiconductor wafer used therefor
JP2617870B2 (en) * 1993-10-04 1997-06-04 株式会社ディスコ Alignment method
KR100328634B1 (en) * 1998-12-22 2002-09-26 주식회사 다산 씨.앤드.아이 Pre-aligner in wafer handling device of wafer probe system
KR20010058703A (en) * 1999-12-30 2001-07-06 서성원 Prealign apparatus for semiconductor wafer
KR20010077238A (en) * 2000-02-01 2001-08-17 서정길 Alignment device of wafer and the compatible method
JP4640715B2 (en) * 2000-07-14 2011-03-02 株式会社ディスコ Alignment method and alignment apparatus
TWI267913B (en) * 2005-09-23 2006-12-01 Advanced Semiconductor Eng Wafer dicing method
US7949425B2 (en) * 2006-12-06 2011-05-24 Axcelis Technologies, Inc. High throughput wafer notch aligner
KR20090051929A (en) * 2007-11-20 2009-05-25 세크론 주식회사 Method of aligning a wafer and method of manufacturing a flip chip using the same
KR20090130499A (en) * 2008-06-16 2009-12-24 정진황 Apparatus and method for aligning a substrate

Also Published As

Publication number Publication date
WO2011139061A3 (en) 2012-04-19
TW201203439A (en) 2012-01-16
WO2011139061A2 (en) 2011-11-10
CN102934216A (en) 2013-02-13
TWI543294B (en) 2016-07-21
PT2011139061W (en) 2014-03-04
CN102934216B (en) 2016-08-03

Similar Documents

Publication Publication Date Title
KR101814270B1 (en) Bonding apparatus and bonding method
TWI673503B (en) Substrate inspection device and control method thereof
KR101404516B1 (en) Calibration method of electronic device mounting apparatus
KR20170110651A (en) Cutting device and cutting method
JP2013074021A (en) Alignment method
KR101275697B1 (en) Method for Aligning Semiconductor Wafer
US9875948B2 (en) Package wafer processing method
SG185017A1 (en) Method for aligning semiconductor materials
US20080175693A1 (en) Position correcting apparatus, vacuum processing equipment and position correcting method
KR101682468B1 (en) Method for alignment of wafer and aligning equipment using of it
JP4612441B2 (en) Alignment method
KR101237056B1 (en) Method for Aligning Semiconductor Package Aggregate
US7355386B2 (en) Method of automatically carrying IC-chips, on a planar array of vacuum nozzles, to a variable target in a chip tester
JP5473715B2 (en) Adjustment method of wafer transfer mechanism
JP4148273B2 (en) Crystal orientation measuring method and crystal orientation measuring apparatus
JPH1187278A (en) Dicing method for semiconductor substrate
JP2007109861A (en) Prober and rotation/transfer control method in prober
JP4127979B2 (en) Method and apparatus for adjusting ball terminal flatness of semiconductor package
TWI843295B (en) Bonding apparatus and bonding method
US20240194636A1 (en) Bonding apparatus, bonding method, and article manufacturing method
TW202329263A (en) Bonding apparatus and bonding method
KR101325634B1 (en) Method for inspecting pcb of semiconductor packages
KR102538843B1 (en) Method of testing semiconductor devices
JP2009170586A (en) Method and apparatus for recognizing electronic component
KR101391200B1 (en) Method for Processing Semiconductor Packages