SG131913A1 - Method for forming multi-layer bumps on a substrate - Google Patents

Method for forming multi-layer bumps on a substrate

Info

Publication number
SG131913A1
SG131913A1 SG200607481-9A SG2006074819A SG131913A1 SG 131913 A1 SG131913 A1 SG 131913A1 SG 2006074819 A SG2006074819 A SG 2006074819A SG 131913 A1 SG131913 A1 SG 131913A1
Authority
SG
Singapore
Prior art keywords
bumps
substrate
melted
forming multi
metal powder
Prior art date
Application number
SG200607481-9A
Other languages
English (en)
Inventor
Hei Ming Shiu
On Lok Chau
Gor Amie Lai
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of SG131913A1 publication Critical patent/SG131913A1/en

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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494Heating methods for reflowing of solder

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)
SG200607481-9A 2005-10-31 2006-10-27 Method for forming multi-layer bumps on a substrate SG131913A1 (en)

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Application Number Priority Date Filing Date Title
US11/263,440 US7279409B2 (en) 2005-10-31 2005-10-31 Method for forming multi-layer bumps on a substrate

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SG131913A1 true SG131913A1 (en) 2007-05-28

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JP (1) JP5079304B2 (de)
KR (1) KR101279234B1 (de)
CN (1) CN1959531A (de)
DE (1) DE102006051151A1 (de)
SG (1) SG131913A1 (de)
TW (1) TWI330876B (de)

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JP5316261B2 (ja) * 2009-06-30 2013-10-16 富士通株式会社 マルチチップモジュールおよびプリント基板ユニット並びに電子機器
TW201133745A (en) * 2009-08-27 2011-10-01 Advanpack Solutions Private Ltd Stacked bump interconnection structure and semiconductor package formed using the same
JP5397243B2 (ja) * 2010-01-28 2014-01-22 日立化成株式会社 半導体装置の製造方法及び回路部材接続用接着シート
US9636782B2 (en) 2012-11-28 2017-05-02 International Business Machines Corporation Wafer debonding using mid-wavelength infrared radiation ablation
US20140144593A1 (en) 2012-11-28 2014-05-29 International Business Machiness Corporation Wafer debonding using long-wavelength infrared radiation ablation
TWI576190B (zh) * 2013-08-01 2017-04-01 Ibm 使用中段波長紅外光輻射燒蝕之晶圓剝離
DE102013220886A1 (de) * 2013-10-15 2015-04-16 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Erzeugen einer metallischen Kontaktierungsstruktur auf einem Halbleitersubstrat
US9474162B2 (en) * 2014-01-10 2016-10-18 Freescale Semiocnductor, Inc. Circuit substrate and method of manufacturing same
CN105632910B (zh) * 2015-03-31 2021-04-30 中国科学院微电子研究所 栅导体层及其制造方法
CN108807202B (zh) * 2018-06-11 2019-11-12 广东海洋大学 一种激光制作钎料凸点的方法
CN112599642A (zh) * 2020-12-18 2021-04-02 泰州隆基乐叶光伏科技有限公司 一种电池片的焊接方法以及光伏组件

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JP3193100B2 (ja) * 1992-03-13 2001-07-30 富士通株式会社 半導体装置
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JPH07321444A (ja) * 1994-05-24 1995-12-08 Fujitsu Ltd 金属パターン形成方法
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JP5079304B2 (ja) 2012-11-21
DE102006051151A1 (de) 2007-06-06
KR20070046756A (ko) 2007-05-03
US7279409B2 (en) 2007-10-09
KR101279234B1 (ko) 2013-06-26
TWI330876B (en) 2010-09-21
TW200725768A (en) 2007-07-01
CN1959531A (zh) 2007-05-09
JP2007129220A (ja) 2007-05-24
US20070099413A1 (en) 2007-05-03

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