SG11202008943VA - Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication - Google Patents

Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication

Info

Publication number
SG11202008943VA
SG11202008943VA SG11202008943VA SG11202008943VA SG11202008943VA SG 11202008943V A SG11202008943V A SG 11202008943VA SG 11202008943V A SG11202008943V A SG 11202008943VA SG 11202008943V A SG11202008943V A SG 11202008943VA SG 11202008943V A SG11202008943V A SG 11202008943VA
Authority
SG
Singapore
Prior art keywords
wafer
auto
correlation
generation
semiconductor device
Prior art date
Application number
SG11202008943VA
Other languages
English (en)
Inventor
Shivam Agarwal
Hariharasudhan Koteeswaran
Priyank Jain
Suvi Murugan
Yuan Zhong
Original Assignee
Kla Tencor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kla Tencor Corp filed Critical Kla Tencor Corp
Publication of SG11202008943VA publication Critical patent/SG11202008943VA/en

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/18Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
    • G05B19/4097Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by using design data to control NC machines, e.g. CAD/CAM
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B13/00Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
    • G05B13/02Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
    • G05B13/0265Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric the criterion being a learning criterion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67276Production flow monitoring, e.g. for increasing throughput
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/30Nc systems
    • G05B2219/45Nc applications
    • G05B2219/45031Manufacturing semiconductor wafers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Artificial Intelligence (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Software Systems (AREA)
  • Medical Informatics (AREA)
  • Evolutionary Computation (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Health & Medical Sciences (AREA)
  • Human Computer Interaction (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
SG11202008943VA 2018-03-28 2019-03-26 Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication SG11202008943VA (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
IN201841011799 2018-03-28
US201862728712P 2018-09-07 2018-09-07
US16/254,951 US11454949B2 (en) 2018-03-28 2019-01-23 Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication
PCT/US2019/024156 WO2019191152A1 (en) 2018-03-28 2019-03-26 Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication

Publications (1)

Publication Number Publication Date
SG11202008943VA true SG11202008943VA (en) 2020-10-29

Family

ID=68054296

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202008943VA SG11202008943VA (en) 2018-03-28 2019-03-26 Auto-correlation of wafer characterization data and generation of composite wafer metrics during semiconductor device fabrication

Country Status (8)

Country Link
US (1) US11454949B2 (ja)
JP (1) JP7366920B2 (ja)
KR (1) KR20200127047A (ja)
CN (1) CN111868904B (ja)
IL (1) IL277400B2 (ja)
SG (1) SG11202008943VA (ja)
TW (1) TW201946099A (ja)
WO (1) WO2019191152A1 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10585419B1 (en) * 2016-04-27 2020-03-10 Beneficial Machine Tools Llc Methods and devices for performing in-situ inspections during a computer assisted setup of a machine tool table
DE102019216267A1 (de) * 2019-10-23 2021-04-29 Siltronic Ag Verfahren zur Herstellung von Halbleiterscheiben
US11847127B2 (en) * 2021-05-12 2023-12-19 Toyota Research Institute, Inc. Device and method for discovering causal patterns
US11653003B2 (en) * 2021-07-16 2023-05-16 City University Of Hong Kong System and method for processing a stream of images

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5240866A (en) * 1992-02-03 1993-08-31 At&T Bell Laboratories Method for characterizing failed circuits on semiconductor wafers
US6442445B1 (en) 1999-03-19 2002-08-27 International Business Machines Corporation, User configurable multivariate time series reduction tool control method
US7760929B2 (en) * 2005-05-13 2010-07-20 Applied Materials, Inc. Grouping systematic defects with feedback from electrical inspection
JP2014150170A (ja) 2013-02-01 2014-08-21 Renesas Electronics Corp 電気特性測定装置および方法
CN104766808B (zh) * 2014-01-07 2017-04-26 无锡华润上华半导体有限公司 晶圆缺陷密度获得方法、测试方法及半导体装置形成方法
US9087176B1 (en) 2014-03-06 2015-07-21 Kla-Tencor Corporation Statistical overlay error prediction for feed forward and feedback correction of overlay errors, root cause analysis and process control
US10576603B2 (en) 2014-04-22 2020-03-03 Kla-Tencor Corporation Patterned wafer geometry measurements for semiconductor process controls
WO2016086138A1 (en) * 2014-11-25 2016-06-02 Stream Mosaic, Inc. Improved process control techniques for semiconductor manufacturing processes
US9558545B2 (en) * 2014-12-03 2017-01-31 Kla-Tencor Corporation Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometry
US9779202B2 (en) * 2015-06-22 2017-10-03 Kla-Tencor Corporation Process-induced asymmetry detection, quantification, and control using patterned wafer geometry measurements
US9824852B2 (en) * 2015-12-31 2017-11-21 Applied Materials Israel Ltd CD-SEM technique for wafers fabrication control
US10503850B2 (en) * 2016-11-22 2019-12-10 Tokyo Electron Limited Generation of a map of a substrate using iterative calculations of non-measured attribute data
US10957608B2 (en) * 2017-04-28 2021-03-23 Kla-Tencor Corporation Guided scanning electron microscopy metrology based on wafer topography

Also Published As

Publication number Publication date
TW201946099A (zh) 2019-12-01
KR20200127047A (ko) 2020-11-09
JP7366920B2 (ja) 2023-10-23
WO2019191152A1 (en) 2019-10-03
IL277400A (en) 2020-11-30
IL277400B1 (en) 2024-02-01
US20190302734A1 (en) 2019-10-03
JP2021519518A (ja) 2021-08-10
IL277400B2 (en) 2024-06-01
CN111868904B (zh) 2024-06-11
CN111868904A (zh) 2020-10-30
US11454949B2 (en) 2022-09-27

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